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VHDL and Verilog

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Raja's Personal Information: VHDL

Raja's Personal Information: VHDL

Some VHDL design examples.

http://www.geocities.com/rajsekharp/vhdl_source_code.html

User Mailing List

User Mailing List

Mailing list provides user support, Confluence related discussion, bug reports, and release notification.

http://news.gmane.org/gmane.comp.lang.confluence

Verilog Dot Com

Verilog Dot Com

Verilog resources page. Includes FAQ, books and links. Also verilog aware Emacs add on.

http://www.verilog.com/

Active-VHDL 3.2

Active-VHDL 3.2

Complete IEEE1076-93 Simulator from Aldec.

http://www.aldec.com/

Verilog.net

Verilog.net

Directory of Verilog documents, tutorials, tools, vendors, books.

http://www.verilog.net/

VHDL Builder

VHDL Builder

Resource related to VHDL, orcad, and links to VHDL simulators.

http://www.vhdlbuilder.com/

Perlilog

Perlilog

As the name implies, Perilog uses a mix of Perl and Verilog to construct parametric hardware designs.

http://www.opencores.org/projects.cgi/web/perlilog/overview

A Brief Introduction to PLI

A Brief Introduction to PLI

A brief introduction to Programming Language Interface.

http://home.europa.com/~celiac/pli.html