Some VHDL design examples.
http://www.geocities.com/rajsekharp/vhdl_source_code.html
Mailing list provides user support, Confluence related discussion, bug reports, and release notification.
http://news.gmane.org/gmane.comp.lang.confluence
Verilog resources page. Includes FAQ, books and links. Also verilog aware Emacs add on.
http://www.verilog.com/
Complete IEEE1076-93 Simulator from Aldec.
http://www.aldec.com/
Directory of Verilog documents, tutorials, tools, vendors, books.
http://www.verilog.net/
Resource related to VHDL, orcad, and links to VHDL simulators.
http://www.vhdlbuilder.com/
As the name implies, Perilog uses a mix of Perl and Verilog to construct parametric hardware designs.
http://www.opencores.org/projects.cgi/web/perlilog/overview
A brief introduction to Programming Language Interface.
http://home.europa.com/~celiac/pli.html