By using the programmable blocks of a Cypress MicroSystems CY8C25122 PSoC microprocessor, it is possible to construct a 100Khz bandwidth white noise generator that provides a unique output sequence for six hours before repeating.
The schematic in Figure exemplifies the simplicity of the hardware design. Since the PSoC chip has an internal oscillator with PLL that allows clocking up to 24Mhz, no external crystal is necessary.
The block diagram in Figure 2 better explains the operation of the circuit. The internal 24Mhz system oscillator is divided down to provide a 200Khz clock. This clock drives a 32-bit pseudo random sequence generator (PRS32) that is implemented in four of the 8 digital blocks internal to the PSoC chip. The output of the PRS32 is routed to an output pin of the chip. The clock also generates an interrupt where the lower six bits of the PRS32 are extracted and then written to the input of a six-bit DAC.
The clock enable is routed to the outside that noise generation can be enabled and disabled if desired. The clock output is also provided for synchronization with the noise or the random sequence.
Visit Here for more.