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PAM-4 Design Challenges and the Implications on Test

PAM-4 Design Challenges and the Implications on Test

As Ethernet technology progresses from 100G to 400G, new test technology, measurement capabilities, and ability to accurately simulate PAM-4 designs for TX and RX hardware are mandatory. The change from NRZ to PAM-4 multilevel signaling presents many new design and measurement challenges.

During design simulation, NRZ historical information from prior generations can be applied to the design. As the industry moves to PAM4, early simulation of the design with EDA tools will become more critical. Common algorithms between simulation and hardware results reduce a fundamental measurement uncertainty, increasing the systematic value of simulation data. PAM-4 transmitter output testing will continue to use sampling and real-time oscilloscopes with built-in measurements that will evolve with the PAM-4 technical needs. PAM-4 input testing can be accomplished with the traditional BERT approach for pattern generation. However, development of new stress types will be required to emulate impairments and new enabling technologies will evolve. Modern high-speed AWGs can provide stressed patterns for PAM 4, and for complex modulation schemes in the future. Keysight engineers are working at the forefront of Ethernet technology and migration to 400G to help you navigate as the technology evolves. Keysight continues to provide powerful solutions for emerging technologies such as PAM-4.

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