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Simulating FPGA Power Integrity Using S-Parameter Models

Simulating FPGA Power Integrity Using S-Parameter Models

Before simulating the frequency domain self-impedance profiles of a PDN, it is important to establish expectations for the simulation results. To do this, an understanding of the fundamental concepts must be attained:

  • Series-Resonance Circuit and Impedance Minimums
  • Parallel-Resonance Circuit and Impedance Maximums
  • Frequency Components of Electrical Signals
  • S-Parameter Model vs. Lumped RLC Model for Decoupling Capacitors

The purpose of a Power Distribution Network (PDN) is to provide power to electrical devices in a system. Each device in a system not only has its own power requirements for its internal operation, but also a requirement for the input voltage fluctuation of that power rail. For Xilinx Kintex™7 and Virtex®-7 FPGAs, the analog power rails have an input voltage fluctuation requirement of not more than 10 mV peak-to-peak from the 10 kHz to the 80 MHz frequency range. The self generated voltage fluctuation on the power rails is a function of frequency and can be described by Ohm’s Law: Voltage (frequency) = Current (frequency) * Self-Impedance (frequency).

Thus, if the user determines the self-impedance (frequency) and knows the current (frequency) of the PDN, then the voltage (frequency) can be determined. The self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of the PDN and is, thus, the subject of this application note.

 

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