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HDMI 2.0 Implementation on Kintex-7 FPGA GTX Transceivers

HDMI 2.0 Implementation on Kintex-7 FPGA GTX Transceivers

This application note covers the design considerations of a High-Definition Multimedia Interface (HDMI™) 2.0 implementation on the Kintex®-7 FPGA GTX transceiver using the performance features of the following Xilinx® LogiCORE™ IP cores:

  • HDMI 1.4/2.0 with HDCP 1.4/2.2 Transmitter Subsystem
  • HDMI 1.4/2.0 with HDCP 1.4/2.2 Receiver Subsystem
  • Video PHY Controller

The design features the transmit-only and the pass-through operation modes for the HDMI solution. In the transmit-only mode, the design displays a colorbar pattern from the LogiCORE IP Test Pattern Generator (TPG) core. In the pass-through mode, an external HDMI source is used to send video data over the HDMI design. The reference design demonstrates the use of the High-bandwidth Digital Content Protection System (HDCP) Revision 1.4/2.2 capability of the HDMI solution. HDCP is used to securely send audiovisual data from an HDCP protected transmitter to HDCP protected downstream receivers. Typically, HDCP 2.2 is used to encrypt content at Ultra High Definition (UHD) while HDCP 1.4 is used as a legacy encryption scheme for lower resolutions.

 

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