[Section Six — Miscellany]
Above
— Basic configuration of the HC193 4-bit synchronous counter. By setting the 4 switches HIGH or LOW you can divide by 1 to 15.
Above — Cascading two 4-bit counters yields division by 1 to 255. If you were to place all 8 switches on a front panel, we would place the left counter’s switches to the right of the 240 weight switches so that we could program it in a more “humanly logical” fashion.
It’s great fun to play with old school digital circuitry such as these CMOS chips. I’ve got the whole series of HC74 synchronous and asynchronous counters in my parts bins.
Above — 3 edge-triggered phase and frequency detectors using D flip flop(s). I normally employ Figure A with active filtering. The op-amp filter boosts the DC output signal up in voltage which may help improve VCO phase noise and stability.
Figure B employs a charge pump. You’ll see diodes or transistors used in charge pumps — often in PLL circuits within ICOM, Yaesu and other brand-name radios.
Compared to the Exclusive OR phase detector ( in the 4046 etc.), edge-triggered PD’s exhibit a greater linear tuning range, plus better capture, lock and tracking characteristics. All of them may be effected by input signal duty cycle. 50% proves best.
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