Basics of the I²C communication protocol

Every chip on an I²C bus connects to the same SDA and SCL lines, and to a common ground. The controller drives the clock and decides who speaks. The other chips are targets: a temperature sensor, a clock chip, a display. Older documents and most Arduino code call them master and slave; NXP changed the words to controller and target in 2021 (NXP Semiconductors).

On an Arduino UNO, SDA is pin A4 and SCL is A5 (the R3 also repeats them on the two pins beside AREF). The ATmega328P's I²C hardware, which Microchip calls TWI, handles up to 400 kHz (Microchip).

No chip on the bus ever drives a line high. Each one has a transistor that can pull the line to ground, or let go. A resistor to the supply, the pull-up, lifts the line back up when everyone has let go. This is called open-drain (open-collector on older bipolar parts).

Two things follow. First, two chips can never short the supply by driving opposite levels, which is what makes a shared bus safe. Second, a target can hold SCL low to make the controller wait (clock stretching), and it can pull SDA low to acknowledge a byte. The cost is speed: the line falls fast through a transistor but rises slowly through a resistor charging the wire's capacitance. That rise sets the pull-up value, worked out below.

A transfer opens with a START: SDA falls while SCL is high. Then the controller clocks out the 7-bit address and one more bit, 0 to write or 1 to read. On the ninth clock it lets go of SDA, and the addressed chip pulls it low. That low bit is the acknowledge (ACK). If no chip answers, SDA stays high: a NACK, and the transfer stops.

Data bytes follow the same pattern, eight bits and an acknowledge. A STOP ends it: SDA rises while SCL is high. Those two moves, START and STOP, are the only times SDA may change while SCL is high (NXP Semiconductors).

Count the clocks and you can time any transfer. Writing one value into a sensor register takes three bytes (address, register number, value), so 27 clocks: 270 µs at 100 kHz. Reading 6 bytes back, the size of an accelerometer's X, Y and Z, takes the register write, a repeated START, the address again and six bytes: 81 clocks, or 810 µs at 100 kHz and 202.5 µs at 400 kHz.

The address is seven bits, so there are 128 of them. The specification reserves two blocks of eight, 0000xxx and 1111xxx, for special jobs such as the general call and 10-bit addressing, which leaves 112 for ordinary chips (NXP Semiconductors). A chip usually has a fixed part of its address and one to three pins that set the rest, so you can fit several of the same chip on one bus.

The trap is the address form. The PCF8574, the chip on most 16×2 LCD backpacks, has the address 0100 A2 A1 A0, which is 0x20 to 0x27. TI's data sheet lists it as 8-bit write addresses, 0x40 to 0x4E (Texas Instruments). The SSD1306 OLED controller is 011110 plus one pin, 0x3C or 0x3D, and some module sellers print that as 0x78 (Solomon Systech). The Arduino Wire library, like most libraries, wants the 7-bit number. If a data sheet address doesn't answer, halve it.

UM10204 defines Standard-mode at up to 100 kHz, Fast-mode at 400 kHz and Fast-mode Plus at 1 MHz (NXP Semiconductors). Faster modes exist, but hobby parts rarely support them. The bus runs only as fast as its slowest chip: the PCF8574 is rated to 100 kHz (Texas Instruments), so a bus with an LCD backpack on it should stay at 100 kHz, whatever else shares it.

With 8 data bits in every 9 clocks, 100 kHz moves at most 11,111 bytes a second. That is plenty for sensors and slow for screens. A 128×64 monochrome OLED holds one bit per pixel, so a full frame is 1,024 bytes; with the address and a control byte it takes 9,234 clocks.

At 100 kHz the frame takes 92.3 ms, about 11 frames a second. At 400 kHz, the SSD1306's I²C limit (400 kHz) (Solomon Systech), it takes 23.1 ms. The same module wired for SPI at 8 MHz needs 1.02 ms (Microchip). In the Arduino Wire library, Wire.setClock(400000) after Wire.begin() switches the bus to Fast-mode, once every chip on it allows it.

The pull-up has a window. Too small, and a chip pulling the line low has to sink more current than it is rated for: the specification promises only 0.4 V at 3 mA, so Rp(min) = (VDD − 0.4 V) ÷ 3 mA. Too large, and the line rises too slowly: the time from 30 % to 70 % of VDD is 0.8473 × Rp × Cb, and it must stay under 1000 ns in Standard-mode and 300 ns in Fast-mode, so Rp(max) = tr ÷ (0.8473 × Cb) (NXP Semiconductors).

Worked example. Take 4 chips at the specification's worst-case 10 pF per pin, plus 60 pF for jumper wires and board traces: Cb = 100 pF. Then Rp(max) is 11.8 kΩ at 100 kHz, 3.54 kΩ at 400 kHz and 1.42 kΩ at 1 MHz. For Rp(min), use the supply at its +10 % high end, as the specification's own example does: 1.08 kΩ on a 3.3 V bus (3.63 V) and 1.70 kΩ on 5 V (5.5 V).

The usual 4.7 kΩ gives a rise time of 398 ns on that bus. Fine for 100 kHz, too slow for 400 kHz. It only meets Fast-mode up to 75 pF of bus capacitance. 2.2 kΩ rises in 186 ns and sinks 2.32 mA at 5.5 V, inside both limits.

Watch for pull-ups you didn't fit. Most breakout boards carry their own pair, often 4.7 kΩ, and every module you add puts another pair in parallel. On 3.3 V you can stack 4 such modules before the total drops under 1.08 kΩ; on 5 V only 2.

Our take: for a breadboard or one small board at 400 kHz, fit 2.2 kΩ on each line if no module has its own. If two or more modules already carry pull-ups, measure SDA to VDD with the power off and add nothing unless the reading is above about 3.5 kΩ. On a long cable, drop to 100 kHz before you go below 1.7 kΩ.

Open-drain makes this easier than with push-pull pins, but not automatic. An UNO reads a high on its I²C pins only above 0.7 × VCC, which is 3.5 V at 5 V (Microchip). A 3.3 V sensor module with pull-ups to 3.3 V gives 0.2 V less than that. It often works on the bench and is not guaranteed. Pulling the bus to 5 V instead can damage a 3.3 V chip that is not 5 V tolerant.

The fix is the level shifter in figure 9, which Philips published for exactly this bus (Philips Semiconductors). When the 3.3 V side pulls low, the MOSFET turns on and pulls the 5 V side down. When the 5 V side pulls low, current through the body diode drags the 3.3 V side down until the MOSFET switches on. Ready-made 4-channel boards carry two of these per bus. Our level shifter guide compares them with buffer chips and dividers.

The ATmega328P on an UNO has all three in hardware, one of each, so the choice usually comes down to the part you are wiring.

SPI uses four wires and a separate chip-select line for each device, but no addresses and no acknowledges, and its push-pull pins run at megahertz. Pick it for screens, SD cards and fast converters.

UART has no clock line at all. Both ends agree on a baud rate, and each byte travels as a start bit, eight data bits and a stop bit (10 bits). At 115,200 baud that is 11,520 bytes a second, about the same as I²C at 100 kHz. It links exactly two devices: a board and a PC, a GPS module, a Bluetooth module. The USB cable on an Arduino is a UART too: a USB-to-UART bridge chip (FT232R, CH340, CP2102 or the UNO R3's ATmega16U2) turns the PC's USB into TX and RX at logic level. USB-to-UART boards with an FT232 or CH340 are what you use to program bare chips and to read debug output.

I²C wins when many slow chips must share few pins: two wires for a dozen sensors, with an acknowledge telling you each one is there.

Sometimes a target is reset halfway through a read, still believes it is sending a 0, and holds SDA low. The controller then cannot send a START. The specification's cure is to send nine clock pulses: the stuck chip finishes its byte within those nine and lets go. If SCL itself is stuck low, only a reset or a power cycle of the targets clears it (NXP Semiconductors). Many I²C libraries do the nine-clock clear for you; on a bare microcontroller you toggle SCL as a plain pin.

The other common fault is a scanner sketch that finds nothing. Work down figure 11 with a multimeter before you suspect the code.

• Before wiring, measure each module's SDA-to-VCC resistance with the power off. It tells you whether it carries pull-ups and what value.
• Run the bus at the speed of its slowest chip. One PCF8574 LCD backpack holds the whole bus to 100 kHz.
• Two modules with the same fixed address cannot share a bus. Use the address pins, a second bus, or an I²C multiplexer chip.
• Keep I²C on the board. Every extra length of cable adds capacitance toward the 400 pF limit; for a long run, slow the clock or fit a bus buffer chip.
• A logic analyser that decodes I²C shows every address, byte and NACK on screen; the cheap 8-channel USB ones can do it.

• Pull-up and pull-down resistorsWhy a floating input needs a defined level.
• RC time constantWhere the 0.8473 × RC rise comes from.
• Logic levelsVIH, VIL and the 3.5 V threshold.
• MOSFET as a switchThe open-drain output and the level shifter.
• 16×2 LCD interfacingThe HD44780 and its I²C backpack.
• 3.3 V to 5 V level shiftingEvery way to join the two, with numbers.
• Microcontrollers sectionPinouts, projects and board comparisons.

• NXP Semiconductors, UM10204 I²C-bus specification and user manual, Rev. 7.0, 1 October 2021 (copy hosted by Pololu) (§3.1.12 and Table 4 p. 16 (16 reserved addresses), §3.1.16 p. 19 (bus clear: nine clock pulses), Table 10 p. 43 (VOL 0.4 V at 3 mA, 20 mA for Fm+; Ci 10 pF; VIL 0.3 VDD, VIH 0.7 VDD), Table 11 p. 44 (fSCL 100 / 400 / 1000 kHz, tr 1000 / 300 / 120 ns, Cb 400 / 400 / 550 pF), §7.1 p. 50 (Rp(max) = tr / 0.8473 Cb, Rp(min) = (VDD − VOL) / IOL))
• Solomon Systech, SSD1306 data sheet, Rev. 1.1, April 2008 (copy hosted by Adafruit), §8.1.5 p. 19, Tables 13-4 p. 52 and 13-6 p. 54 (I²C address 0111100 or 0111101 (SA0); 128 × 64 display RAM; I²C clock cycle 2.5 µs minimum (400 kHz); 4-wire SPI clock cycle 100 ns minimum (10 MHz))
• Texas Instruments, PCF8574 Remote 8-Bit I/O Expander for I²C Bus, SCPS068K, revised September 2024, §5.6 and §7.3.3 (fSCL 100 kHz maximum; address 0100 A2 A1 A0, listed as 8-bit write addresses 0x40 to 0x4E and read addresses 0x41 to 0x4F)
• Microchip, ATmega48A/PA/88A/PA/168A/PA/328/P data sheet, DS40002061B (2020), Table 19-5 p. 177 and §22.1 p. 215 (SPI clock up to fosc/2 (8 MHz on a 16 MHz UNO); 2-wire Serial Interface (TWI) up to 400 kHz, 7-bit address space; Table 30-1 p. 323: I/O pin pull-up 20 to 50 kΩ)
• Microchip, DS40002061B, Table 29-14 Two-wire Serial Bus Requirements, p. 317 (I²C input high voltage min 0.7 × VCC)
• Philips Semiconductors, AN97055, Bi-directional level shifter for I²C-bus and other systems, 4 August 1997 (copy hosted by Adafruit) (one n-channel MOSFET per line, gate to the low supply; threshold about 1 V below the lowest low-side supply (max 2 V for a 3 V side))

Read on 17 October 2026. NXP's own link to UM10204 did not answer that day, so the link above is a copy of the same Rev. 7.0 file. Our own choices: supplies at +10 % for the minimum pull-up, a 100 pF example bus (4 pins at 10 pF plus 60 pF for wiring), 4.7 kΩ pull-ups on each breakout module, a 6-byte sensor read and 115,200 baud 8N1. Transfer times count clock periods only, without the short setup times around START and STOP. This page rebuilds an older ElectronicsInfoline article of the same title; none of its text is reused.