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8051 microcontroller pin diagram and pin description

By Bulan Sarkar, founder of ElectronicsInfoline (since 2000) · About a 9-minute read

The 8051 in a 40-pin DIP has 32 I/O pins in four 8-bit ports, and most of them do a second job. This page gives every pin, what it does, and the circuit you need around the chip before it will run at all.

It is drawn for the AT89S52, the flash 8051 from Microchip (formerly Atmel), and checked against Microchip's datasheet 1919D–MICRO–6/08. Each fact names the page it came from. The older AT89C51 uses the same pinout, with the differences listed further down.

Pin 40 is VCC and pin 20 is ground. Port 1 is pins 1 to 8, RST is 9, Port 3 is 10 to 17, the crystal goes on 18 and 19. Port 2 is pins 21 to 28, then PSEN on 29, ALE on 30 and EA on 31, and Port 0 runs from P0.7 on pin 32 up to P0.0 on pin 39 (AT89S52 datasheet, p. 2).

Three things catch beginners. Tie EA to VCC, or the chip ignores its own flash. Port 0 has no pull-ups, so it cannot drive a pin high without external resistors. And RST is active high, unlike the active-low reset on an AVR or most ARM chips.

8051 pin diagram

8051 · AT89S52 · top view1(T2) P1.02(T2EX) P1.13P1.24P1.35P1.46(MOSI) P1.57(MISO) P1.68(SCK) P1.79RST10(RXD) P3.011(TXD) P3.112(INT0) P3.213(INT1) P3.314(T0) P3.415(T1) P3.516(WR) P3.617(RD) P3.718XTAL219XTAL120GND21P2.0 (A8)22P2.1 (A9)23P2.2 (A10)24P2.3 (A11)25P2.4 (A12)26P2.5 (A13)27P2.6 (A14)28P2.7 (A15)29PSEN30ALE/PROG31EA/VPP32P0.7 (AD7)33P0.6 (AD6)34P0.5 (AD5)35P0.4 (AD4)36P0.3 (AD3)37P0.2 (AD2)38P0.1 (AD1)39P0.0 (AD0)40VCCport pinspowercontrol, clock
Figure 1. AT89S52 40-lead PDIP, top view, notch up. Pin names and alternate functions as printed on AT89S52 datasheet p. 2; a bar marks an active-low signal.

Pins count down the left side from the notch and back up the right, so pin 1 sits opposite pin 40 and pin 20 opposite pin 21. Port 0 is numbered against the flow: P0.0 is pin 39, next to VCC, and P0.7 is pin 32. The IC packages lesson explains the numbering convention for DIPs in general.

Pin description, all 40 pins

AT89S52, 40-lead PDIP. Page = where in datasheet 1919D–MICRO–6/08 the pin is described.
PinNameSecond functionWhat it doesPage
1P1.0T2Port 1 I/O; Timer 2 external count input, clock-out (AT89S52)4
2P1.1T2EXPort 1 I/O; Timer 2 capture/reload trigger (AT89S52)4
3P1.2Port 1 I/O4
4P1.3Port 1 I/O4
5P1.4Port 1 I/O4
6P1.5MOSIPort 1 I/O; MOSI for in-system programming4
7P1.6MISOPort 1 I/O; MISO for in-system programming4
8P1.7SCKPort 1 I/O; SCK for in-system programming4
9RSTReset input, active high5
10P3.0RXDPort 3 I/O; serial input5
11P3.1TXDPort 3 I/O; serial output5
12P3.2INT0Port 3 I/O; external interrupt 05
13P3.3INT1Port 3 I/O; external interrupt 15
14P3.4T0Port 3 I/O; Timer 0 external input5
15P3.5T1Port 3 I/O; Timer 1 external input5
16P3.6WRPort 3 I/O; external data memory write strobe5
17P3.7RDPort 3 I/O; external data memory read strobe5
18XTAL2Oscillator amplifier output6
19XTAL1Oscillator amplifier input, or external clock in6
20GNDGround4
21P2.0A8Port 2 I/O; address bit A8 on external memory cycles4
22P2.1A9Port 2 I/O; address A94
23P2.2A10Port 2 I/O; address A104
24P2.3A11Port 2 I/O; address A114
25P2.4A12Port 2 I/O; address A124
26P2.5A13Port 2 I/O; address A134
27P2.6A14Port 2 I/O; address A144
28P2.7A15Port 2 I/O; address A154
29PSENRead strobe for external program memory6
30ALE/PROGAddress latch enable output; program pulse input while the flash is programmed5
31EA/VPPExternal access enable: tie to VCC to run from on-chip flash; 12 V programming enable6
32P0.7AD7Port 0 I/O, open drain; multiplexed address/data AD74
33P0.6AD6Port 0 I/O, open drain; AD64
34P0.5AD5Port 0 I/O, open drain; AD54
35P0.4AD4Port 0 I/O, open drain; AD44
36P0.3AD3Port 0 I/O, open drain; AD34
37P0.2AD2Port 0 I/O, open drain; AD24
38P0.1AD1Port 0 I/O, open drain; AD14
39P0.0AD0Port 0 I/O, open drain; AD04
40VCCSupply voltage4

Port 0 needs pull-up resistors

Port 0 (pins 32 to 39) is open drain. Each pin can pull low hard, eight TTL loads' worth, but has nothing to pull it high. Write a 1 to a Port 0 pin and it simply lets go: the pin floats (AT89S52 datasheet, p. 4). The datasheet gives Port 0 internal pull-ups only while it is acting as the address/data bus to external memory.

So when Port 0 is used as ordinary I/O, fit a pull-up resistor on every pin you use. We use 10 kΩ, usually as one 9-pin resistor network across all eight. That value is our choice, not the datasheet's: it holds a floating input firmly high and wastes only 0.5 mA while the pin is held low. The pull-up and pull-down resistors lesson works through how to size one.

The datasheet also asks for external pull-ups on Port 0 while the flash is being verified in a programmer, for the same reason (AT89S52 datasheet, p. 4).

Our take: if a design only needs 24 I/O lines, leave Port 0 for last. It is the one port that needs extra parts.

Ports 1, 2 and 3

Ports 1, 2 and 3 have internal pull-ups. To read a pin as an input, first write a 1 to it; the weak pull-up then holds it high and anything outside can pull it low (AT89S52 datasheet, p. 4). There is no separate direction register. After reset every port latch holds 1s (FFH), so every pin starts out as an input (AT89S52 datasheet, p. 7).

Those pull-ups are weak. The datasheet guarantees a high of 2.4 V only up to 60 µA of load, while the same pin can sink 1.6 mA and stay under 0.45 V (AT89S52 datasheet, p. 29). So an 8051 drives an LED or a transistor base by pulling it low, not by pushing it high. Keep each pin under 10 mA, each of Ports 1 to 3 under 15 mA in total, Port 0 under 26 mA, and the whole chip under 71 mA (AT89S52 datasheet, p. 29).

Port 1 (pins 1 to 8). On the AT89S52, P1.0 is also the Timer 2 count input T2 and P1.1 its trigger T2EX. P1.5, P1.6 and P1.7 carry MOSI, MISO and SCK when the chip is being programmed in-circuit (AT89S52 datasheet, p. 4). If you program it on the board, keep those three free of anything that would load them.

Port 2 (pins 21 to 28) puts out the high address byte, A8 to A15, when the chip runs code from external memory or uses 16-bit external data addresses (AT89S52 datasheet, p. 4). With everything on-chip it is a plain I/O port.

Port 3 (pins 10 to 17) holds the serial port, interrupts and timer inputs (AT89S52 datasheet, p. 5):

PinPort bitSecond function
10P3.0RXD: serial input
11P3.1TXD: serial output
12P3.2INT0: external interrupt 0
13P3.3INT1: external interrupt 1
14P3.4T0: Timer 0 external input
15P3.5T1: Timer 1 external input
16P3.6WR: external data memory write strobe
17P3.7RD: external data memory read strobe

If you use the serial port or an interrupt input, leave that pin out of any code that writes Port 3 as a whole byte.

RST, ALE/PROG, PSEN and EA/VPP

RST, pin 9. Reset is active high. Holding it high for two machine cycles while the oscillator runs resets the chip (AT89S52 datasheet, p. 5). A machine cycle is 12 oscillator periods (AT89S52 datasheet, p. 12), so at 11.0592 MHz two cycles last 2.17 µs. The pin has its own pull-down of 50 kΩ to 300 kΩ inside (AT89S52 datasheet, p. 29). When the watchdog times out, the chip drives RST high itself for 98 oscillator periods (AT89S52 datasheet, p. 5).

ALE/PROG, pin 30. Address Latch Enable pulses to latch the low address byte from Port 0 into an external latch. It runs at one sixth of the oscillator frequency even with no external memory, so it makes a handy check that the crystal is running: 11.0592 MHz gives 1.8432 MHz pulses on a scope. (Setting bit 0 of the AUXR register at 8EH silences it except during MOVX and MOVC.) The same pin takes the program pulse during flash programming (AT89S52 datasheet, p. 5).

PSEN, pin 29. Program Store Enable is the read strobe for external program memory (AT89S52 datasheet, p. 6). With code in the on-chip flash, leave it unconnected.

EA/VPP, pin 31. External Access. Strap it to VCC to run from the on-chip flash; strap it to ground and the chip fetches every instruction from external memory (AT89S52 datasheet, p. 6). A board with EA grounded or floating looks exactly like a dead chip. The pin also takes the 12 V programming voltage in a parallel programmer.

XTAL1 and XTAL2, pins 19 and 18. Input and output of the on-chip inverting amplifier. A crystal or ceramic resonator goes between them, or an external clock drives XTAL1 with XTAL2 left open (AT89S52 datasheet, p. 19). The crystals and resonators lesson explains what the crystal is doing there.

Minimal circuit: what the chip needs to run

+5 VGNDAT89S52VCC 4020 GND100 nF9 RST10 µF10 kΩ19 XTAL118 XTAL211.0592MHz33 pFeachP0.0 3910 kΩpull-upEA 31P1.0 12.2 kΩLED
Figure 2. The least an AT89S52 needs to run: 5 V with decoupling, EA tied high, a power-on reset and an 11.0592 MHz crystal with 33 pF to ground on each side. The pull-up on P0.0 and the LED sunk by P1.0 show how the two kinds of port are wired.

Supply. The -24 grade runs from 4.0 V to 5.5 V up to 24 MHz; the -33 grade needs 4.5 V to 5.5 V for 33 MHz (AT89S52 datasheet, p. 34). Put a 100 nF ceramic capacitor across pins 40 and 20, as close to the chip as the board allows (see IC power decoupling).

Crystal. The datasheet asks for C1 and C2 of 30 pF ± 10 pF with a crystal, or 40 pF ± 10 pF with a ceramic resonator (AT89S52 datasheet, p. 19); 33 pF is a common value inside that range. We show 11.0592 MHz rather than 12 MHz because it divides down to serial baud rates exactly: 11,059,200 / (12 × 32 × 3) = 9,600 baud.

Reset. The datasheet gives the timing rule and leaves the parts to you. It needs RST high for two machine cycles with the oscillator already running, and after power-up the oscillator takes time to start. Our choice, and a common one, is 10 µF from VCC to RST and 10 kΩ from RST to ground. At switch-on the capacitor holds RST at VCC and then lets it fall with a time constant of 10 kΩ × 10 µF = 100.0 ms.

RST counts as high down to 0.7 VCC (AT89S52 datasheet, p. 29), so it stays high for 100.0 ms × ln(1/0.7) = 35.7 ms. The internal pull-down sits in parallel with the 10 kΩ; at its lowest, 50 kΩ, the pair is 8.33 kΩ and the time drops to 29.7 ms. Either way that is thousands of times the 2.17 µs the chip needs, which leaves the crystal plenty of time to get going. The RC time constant lesson has the charging curve behind those numbers. A push button across the capacitor adds a manual reset.

The LED. P1.0 sinks it from 5 V through 2.2 kΩ. With a red LED at about 2 V and the pin at its 0.45 V limit, the current is (5 − 2 − 0.45) V / 2.2 kΩ = 1.16 mA. That stays under the 1.6 mA at which the datasheet guarantees the low level (AT89S52 datasheet, p. 29), and a modern indicator LED is plainly visible at a milliamp. For anything heavier, such as a relay, switch it through a transistor: our 2N2222 page works through a relay driver, and relay driving explains the diode it needs.

Driving the pins from code

Each port is also a special function register, at 80H (P0), 90H (P1), A0H (P2) and B0H (P3), and every pin is bit-addressable (AT89S52 datasheet, p. 7). In 8051 assembly:

MOV   P1,#0FFh  ; 1s in the latch: Port 1 pins become inputs
MOV   A,P1      ; read all eight pins into A
CLR   P1.0      ; pin 1 low: the LED in Figure 2 lights
SETB  P1.0      ; pin 1 released to the pull-up: LED off

In C, Keil C51 names a pin with sbit LED = P1^0; and SDCC's header calls the same bit P1_0. Writing a whole port is P1 = 0xFF; in both.

AT89S52 and AT89C51

The two share the pinout. What changes is the memory, the third timer and how the chip is programmed.

AT89S52AT89C51
Flash8K bytes4K bytes
RAM256 bytes128 bytes
TimersThree (Timer 2 on P1.0/P1.1)Two; P1.0 and P1.1 are plain I/O
ProgrammingIn-system, over P1.5 to P1.7Parallel programmer; 12 V or 5 V on EA/VPP, depending on the version shipped
Clock0 to 33 MHz0 to 24 MHz
Datasheet noticeNone"Not recommended for new designs. Use AT89S51."

Sources: (AT89S52 datasheet, p. 1) (AT89S52 datasheet, p. 2) (AT89C51 datasheet, p. 1) (AT89C51 datasheet, p. 6).

So a board built for an AT89C51 takes an AT89S52 without changes, and gains in-circuit programming if the three SPI pins are brought out to a header.

Lessons underneath this

Datasheets this page was checked against

Read on 30 September 2026. Makers revise datasheets; if your copy is newer and a number here disagrees with it, the datasheet wins, and we would like to hear about it.