Parts

74HC165 shift register: pinout, read order, eight buttons on three pins and chaining

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The 74HC165 reads eight inputs and hands them to a microcontroller one bit at a time on a single pin. Pin 1 is SH/LD, pin 2 CLK, pin 9 the serial output QH, pin 10 the serial input SER, pin 15 CLK INH, pin 16 VCC and pin 8 ground. The eight inputs are split across both sides: E to H on pins 3 to 6, A to D on pins 11 to 14.

Pull SH/LD low and all eight inputs are copied in at once. Take it high and each rising clock edge moves the next bit onto QH: H first, A last. Three controller pins read 8 inputs, and chained chips read 16, 24 or 32 on the same three. The figures here come from Texas Instruments' SN74HC165 sheet (SCLS116H).

Datasheet: Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H) (PDF)

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Pinout by package

SN74HC165N DIP-16 · TI1=SH/LD 2=CLK 3=E 4=F 5=G 6=H 7=/QH 8=GND 9=QH 10=SER 11=A 12=B 13=C 14=D 15=CLK INH 16=VCC
top view, notch upSN74HC165N116SH/LDVCC215CLKCLK INH314ED413FC512GB611HA710/QHSER89GNDQH

Top view, notch up: pin 1 (SH/LD) is top left. The inputs are split: E to H on pins 3 to 6, A to D on pins 11 to 14.

The SOIC (SN74HC165D), SSOP (DB) and TSSOP (PW) versions use the same pin numbers.

Source: Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H), p. 3 (D, DB, N, NS, J, W or PW package top view, and the pin functions table); Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H), p. 1 (Device information: SN74HC165N, PDIP (16), 6.60 mm × 18.92 mm)

Load, then shift: the order the bits come out

The chip has two modes, picked by SH/LD. While SH/LD is low the eight flip-flops follow the inputs A to H, and the clock is ignored. When SH/LD goes high they hold what they had, and from then on each rising edge on CLK shifts everything one place toward QH, with SER filling the empty place at the A end.

SH/LDCLKQHHGFEDCBAload: H is on QH at oncethen each rising CLK edge brings up the next input
Figure 1. One read. H is on QH straight after the load; seven clock edges bring up G to A.

The first bit needs no clock. Read QH right after the load, then clock and read seven more times. Code that clocks first and reads afterwards loses H and picks up a bit from SER at the end. Arduino's shiftIn() raises the clock before each read, so set CLK high before the load pulse. Its first raise then makes no edge, and with MSBFIRST H lands in bit 7 and A in bit 0.

Absolute maximum ratings

Absolute maximum and operating ratings, TI SCLS116H
ParameterSN74HC165NDIP-16
Supply voltage, absolute maximum VCC−0.5 to 7 V
Supply voltage, recommended VCC2 to 6 V (5 V nominal)
Continuous output current, QH or /QH IO±25 mA
Current through VCC or GND±50 mA
Input and output clamp current IIK, IOK±20 mA
ESD, human body model V(ESD)±1500 V
Thermal resistance, PDIP-16 / SOIC-16 / TSSOP-16 RθJA67 / 73 / 108 °C/W
Operating temperature TA−40 to 125 °C (SN74)
Input rise or fall time, max Δt/ΔvVCC = 4.5 V500 ns/V

It runs from 2 V to 6 V, so a 5 V Arduino board or a 3.3 V ESP32 board can power it directly. Power it from the same supply as the controller, so its QH output swings to the controller's own rail.

Input levels, leakage and timing

Electrical and timing characteristics, SN74HC165 at VCC = 4.5 V unless marked
ParameterSN74HC165NDIP-16
High-level input voltage, min VIH4.5 V / 6 V3.15 V / 4.2 V
Low-level input voltage, max VIL4.5 V / 6 V1.35 V / 1.8 V
Input leakage, max II6 V, 25 °C / −40 to 125 °C±100 nA / ±1000 nA
Input capacitance Ci3 pF typ, 10 pF max
Output high, min VOHIOH = −4 mA, 25 °C / to 85 °C3.98 V (4.3 V typ) / 3.84 V
Output low, max VOLIOL = 4 mA, 25 °C / to 125 °C0.26 V (0.17 V typ) / 0.33 V
Supply current, max ICC6 V, inputs at a rail8 µA (25 °C), 80 µA (to 85 °C)
Clock frequency, max fclock25 °C / to 85 °C31 / 25 MHz
SH/LD low pulse, min tw−40 to 85 °C20 ns
Set-up, SH/LD high before CLK↑, min tsu−40 to 85 °C20 ns
Set-up, SER before CLK↑, min tsu−40 to 85 °C10 ns
CLK or SH/LD to QH, max tpdCL = 50 pF, 25 °C / to 85 °C30 ns (15 ns typ) / 38 ns
Power dissipation capacitance Cpdtypical, no load75 pF

The input thresholds track the supply: TI gives 3.15 V and 1.35 V at 4.5 V, and 4.2 V and 1.8 V at 6 V. Both pairs are 0.7 and 0.3 of VCC, so on 5 V a high must be at least 3.5 V and a low at most 1.5 V.

Chaining chips for 16, 24 or 32 inputs

Wire QH of the second chip to SER of the first, give both chips the same SH/LD and CLK, and read QH of the first chip as before. After eight clocks the first chip's bits are out and the second chip's H is on QH, so sixteen reads give both bytes. Tie SER on the last chip in the chain to ground, so the bits that follow read as 0.

MCUoutoutinchip 1SH/LDCLKSERQHA to Hchip 2SH/LDCLKSERQHA to Hgreen: chip 1 QH to the MCU, read first (bits 1 to 8)red: chip 2 QH into chip 1 SER (bits 9 to 16)
Figure 2. Two chips, three pins. The chip wired to the controller comes out first.

Each extra chip adds eight inputs, so four chips read 32 on the same three pins. TI's application section draws the same cascade, QH to SER, with 0.1 µF from VCC to ground at each chip.

Worked example: eight buttons and their pull-ups

Each input needs a defined level when its button is open. The usual way is a pull-up resistor to 5 V on every input and the button to ground, so a pressed button reads 0. With 10 kΩ:

1. Pressed. The input is at 0 V, well under 1.5 V. Each pressed button carries 5 V / 10 kΩ = 500 µA, and all eight held down take 4 mA.

2. Released. The worst input leakage is 1 µA, which drops 10 mV across the pull-up and leaves 4.99 V on the pin, far above 3.5 V. Leakage alone would allow a pull-up as large as (5 V − 3.5 V) / 1 µA = 1.5 MΩ, but a value that large picks up noise from the wiring.

3. The release edge. The pull-up charges the input's 10 pF plus the 40 pF we allow for the leads, so the pin rises past 3.5 V in 602 ns after the button opens. A 100 kΩ pull-up takes 6.02 µs. Either is far shorter than a human press, so for buttons the choice comes down to current and noise.

R1 10 kΩ +5 V S1 button C1 50 pF input + leads A (pin 11)
Figure 3. One input as ngspice checked it: pressed, the pin sits at 0 V and the button carries 500 µA; released, 10 kΩ lifts 50 pF past 3.5 V in 602 ns.
reads 0not definedreads 1VIL 1.5 VVIH 3.5 Vpressed: 0 Vreleased: 4.99 Vinput voltage at 5 V; thresholds 0.3 and 0.7 of VCC
Figure 4. Where the two button states sit against the 5 V thresholds.

Debounce in software: a contact can bounce for a while after it closes, and the chip reads whatever the pin shows at the load pulse. Reading every few milliseconds and acting on two equal reads in a row is enough for buttons.

Worked example in numbers

Pins used
3
Inputs per chip
8
Pull-up current, pressed
500 µA
32 inputs at 1 MHz
32 µs

How long does a read take?

A read is one load pulse of at least 20 ns, 20 ns of set-up before the first clock, then eight clock periods per chip. At the chip's 25 MHz limit (SN74, up to 85 °C, 4.5 V) one chip reads in 360 ns. Software on a small microcontroller usually clocks nearer 1 MHz, and then one chip takes 8.04 µs and four take 32 µs.

1 chip, 25 MHz360 ns2 chips, 25 MHz680 ns4 chips, 25 MHz1.32 µs1 chip, 1 MHz8.04 µs2 chips, 1 MHz16 µs4 chips, 1 MHz32 µs0.1 µs1 µs10 µs100 µsblue: 25 MHz chip limit; red: 1 MHz from software
Figure 5. Read time grows with the number of chips. Even 32 inputs from software take a few tens of microseconds.

Hardware SPI can do the shifting: CLK on the SPI clock, QH on MISO, and SH/LD on any spare pin pulsed low before each transfer. Keep the clock under 25 MHz and the chip keeps up.

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Tips and checks

  • Read QH before the first clock. That bit is input H, and it is the one people lose. With Arduino's shiftIn(), set CLK high before the load pulse.
  • Tie CLK INH to ground and SER on the last chip to ground. Neither may float.
  • Fit 100 nF from VCC to ground at every chip; TI's sheet asks for 0.1 µF at each VCC pin.
  • Pin numbers do not follow the letters: A is pin 11 and H is pin 6. Check the pinout before you wire the buttons in order.
  • If the bits never change when you press a button, check the SH/LD line first. If it never goes low, the chip never loads and only shifts out what SER feeds in.

Substitutes

Any 74HC165 from another maker should drop into the same socket with the same pins; we could only read TI's sheet for this page, so check another maker's timing table before running near the clock limit.

Pin numbers as on the DIP-16 top view, notch at pin 1.
PartPinsVerdict
SN74HC165D / SN74HC165PWsame as the DIPThe same TI die in SOIC and TSSOP for a PCB, with the same pin numbers and the same data sheet.Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H), p. 3
SN54HC165Jsame as the DIPThe military-temperature version in a ceramic DIP, rated −55 to 125 °C. Same pins, slower limits when hot (21 MHz at 4.5 V), and far dearer.Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H), p. 3; Texas Instruments SNx4HC165 8-Bit Parallel-Load Shift Registers (SCLS116H), p. 8

Bench check: is it working?

  1. Wire VCC, ground and 100 nF; tie CLK INH and SER to ground; a 10 kΩ pull-up on each of A to H.
  2. Connect SH/LD and CLK to two output pins and QH to an input pin.
  3. Pulse SH/LD low, then read QH with no button pressed. It should read 1 (input H).
  4. Press the button on H and repeat. The first bit should now read 0, and the other seven should stay 1.
  5. Press the button on A. Only the eighth bit should change.

The logic levels lesson explains the 0.7 VCC and 0.3 VCC input thresholds, and the 74HC595 is the output twin of this chip.

What we'd do

Use the SN74HC165N for breadboard input expansion: 10 kΩ pull-ups, buttons to ground, CLK INH and the last SER to ground, 100 nF at each chip. Read QH before the first clock (with shiftIn() and MSBFIRST, hold CLK high through the load) and debounce in software.

Questions people ask

What is the difference between the 74HC165 and the 74HC595?

The 74HC165 is an input chip: parallel in, serial out. The 74HC595 is an output chip: serial in, parallel out. A board can use both on the same clock line.

Why is my first bit missing or every bit shifted by one?

Input H is on QH as soon as SH/LD goes high, before any clock. Code that clocks before it reads skips H and reads one extra bit from SER at the end.

How many 74HC165 chips can I chain?

The sheet sets no limit. Each chip adds eight clocks to a read, so four chips at 1 MHz take about 32 µs; long chains need a clean clock line with 100 nF at every chip.

Does the 74HC165 work at 3.3 V?

Yes. It runs from 2 V to 6 V, and its input thresholds scale with the supply.

What pull-up resistor should I use for buttons?

10 kΩ is a good default on 5 V: 500 µA per pressed button, and the released input sits at 4.99 V even with the worst leakage.

Buying a 74HC165 in India

Shops list it as 74HC165 or SN74HC165N in DIP-16, and as 74HC165D for boards. Buy a branded part for anything that runs near the clock limit. Our guide to buying electronic components in India compares ten online sellers and covers how to spot fakes.

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