Parts
74HC245 bus transceiver: pinout, DIR and OE, bus fights and the 3.3 V question
By Bulan Sarkar
The 74HC245 passes eight signals between two sides, A and B, in whichever direction pin 1 says. Pin 1 is DIR, pin 19 OE, pin 20 VCC and pin 10 ground; A1 to A8 are pins 2 to 9 and B1 to B8 are pins 18 down to 11, so each A pin sits straight across the chip from its B partner.
DIR high sends A to B, DIR low sends B to A, and OE high cuts both sides off. Two things catch people out: two drivers enabled onto one line, and using the plain HC part for 3.3 V to 5 V work, which it cannot do reliably. The figures come from Texas Instruments' SN74HC245 sheet (SCLS131F), with the HCT and LVC versions from TI's own sheets.
Datasheet: Texas Instruments SNx4HC245 Octal Bus Transceivers With 3-State Outputs (SCLS131F) (PDF)
Pinout by package
Top view, notch up: pin 1 (DIR) is top left. A1 to A8 run down the left side, B1 to B8 run up the right side, so A1 sits across from B1.
The SOIC (SN74HC245DW), SSOP (DB) and TSSOP (PW) versions use the same pin numbers.
Source: Texas Instruments SNx4HC245 Octal Bus Transceivers With 3-State Outputs (SCLS131F), p. 3 (DB, DGV, DW, N, J, W or PW package top view, and the pin functions table); Texas Instruments SNx4HC245 Octal Bus Transceivers With 3-State Outputs (SCLS131F), p. 1 (Device information: N (PDIP, 20), 24.33 mm × 6.35 mm)
DIR and OE: the three modes
The chip is eight buffers that can face either way. DIR sets the direction for all eight at once; there is no per-channel choice. OE is active low: with it low the chip drives whichever side DIR names, and with it high every A and B pin goes high-impedance, so the two buses are disconnected.
Used one way only, the chip is an eight-line buffer: tie DIR to VCC, OE to ground, feed the A side and take the B side out. That is the common case on hobby boards, where it sits between a controller and LEDs, a long ribbon cable or another board.
Absolute maximum ratings
| Parameter | SN74HC245NDIP-20 |
|---|---|
| Supply voltage, absolute maximum VCC | −0.5 to 7 V |
| Supply voltage, recommended VCC | 2 to 6 V (5 V nominal) |
| Input and output voltage, recommended VI, VO | 0 to VCC |
| Continuous output current, per pin IO | ±35 mA |
| Current through VCC or GND | ±70 mA |
| Design limit, TI application sectionper output / whole part | 25 mA / 75 mA |
| Input and output clamp current IIK, IOK | ±20 mA |
| ESD, human body model / charged device V(ESD) | ±3000 V / ±1000 V |
| Thermal resistance, PDIP-20 / SOIC-20 / TSSOP-20 RθJA | 57.0 / 77.0 / 99.7 °C/W |
| Operating temperature TA | −40 to 85 °C (SN74) |
| Input rise or fall time, max Δt/ΔvVCC = 4.5 V | 500 ns |
Two current figures matter and they do not quite agree. The absolute maximum is 35 mA per output and 70 mA through the VCC or ground pin, while the design notes in the same sheet allow 25 mA per output and 75 mA for the part. Design to the lower pair: 25 mA per output and no more than 70 mA for all eight together.
Input levels, output drive and timing
| Parameter | SN74HC245NDIP-20 |
|---|---|
| High-level input voltage, min VIH4.5 V / 6 V | 3.15 V / 4.2 V |
| Low-level input voltage, max VIL4.5 V / 6 V | 1.35 V / 1.8 V |
| Output high, min VOHIOH = −6 mA, 25 °C / to 85 °C | 3.98 V (4.3 V typ) / 3.84 V |
| Output low, max VOLIOL = 6 mA, 25 °C / to 85 °C | 0.26 V (0.17 V typ) / 0.33 V |
| Off-state (high-Z) leakage, A or B IOZ6 V, −40 to 85 °C | ±5 µA |
| Input leakage, DIR or OE II6 V, −40 to 85 °C | ±1000 nA |
| Supply current, max ICC6 V, inputs at a rail | 8 µA (25 °C), 80 µA (to 85 °C) |
| A to B or B to A delay, max tpdCL = 50 pF, 25 °C / to 85 °C | 21 ns (15 ns typ) / 26 ns |
| OE to output on, max tenCL = 50 pF, to 85 °C | 58 ns |
| OE to output off, max tdisCL = 50 pF, to 85 °C | 50 ns |
| Power dissipation capacitance Cpdper transceiver, typical, no load | 40 pF |
TI gives the input thresholds at 4.5 V and 6 V: 3.15 V and 1.35 V, then 4.2 V and 1.8 V. Both pairs are 0.7 and 0.3 of VCC, so on a 5 V supply a high must be at least 3.5 V and a low at most 1.5 V. A signal goes through in 26 ns at worst (up to 85 °C, 50 pF load), fast enough for anything a hobby bus carries.
3.3 V to 5 V: why the HC part falls short
A common plan is to power a 74HC245 from 5 V and drive its A side from a 3.3 V controller. On 5 V the chip needs 3.5 V for a high. A 3.3 V output reaches 3.3 V at best, 0.2 V short, before any load or temperature drift pulls it lower. It often works on the bench and then fails on a warm day or a different chip.
The other direction is worse. Run the HC245 on 3.3 V so its outputs suit the controller, and its inputs may not go above VCC; a 5 V signal pushes current into the input clamp diodes and up into the 3.3 V rail. TI's own application drawing shows the part between 5 V and 3.3 V systems, but its input-voltage row (0 to VCC) rules out both arrangements.
Both relatives use the same 20-pin layout, so a board laid out for a 74HC245 takes either one. Neither works in both directions at once across the two voltages; a bus that has to turn round between 3.3 V and 5 V needs a dual-supply translator instead.
Worked example: two drivers on one line
The datasheet warns about bus contention: two outputs enabled onto the same wire, one pulling high and one pulling low. TI's typical output figures at 4.5 V (4.3 V at 6 mA out, 0.17 V at 6 mA in) put the output resistances near 33.3 Ω high and 28.3 Ω low. On 5 V:
1. The current. 5 V / (33.3 Ω + 28.3 Ω) = 81.1 mA, flowing from one chip's output straight into the other's. That is 2.32 times the 35 mA absolute maximum for an output.
2. The level. The line settles at 81.1 mA × 28.3 Ω = 2.3 V, between 1.5 V and 3.5 V. Anything reading that line gets neither a 0 nor a 1.
3. The cure. Take one driver's OE high and the fight stops: its output goes high-impedance and the other chip has the line to itself.
These are typical figures; a real pair of chips will differ, but not by enough to bring the current under the limit. A fight that lasts as long as a program runs keeps both outputs well past their rating the whole time.
Worked example in numbers
- Bus fight current
- 81.1 mA
- Output limit
- 35 mA
- 5 V input high, min
- 3.5 V
- Turnaround, OE off + on
- 108 ns
Turning a two-way bus round
On a bus that carries data both ways, change DIR only while OE is high. Take OE high, wait 50 ns for the outputs to let go (the SN74's worst case to 85 °C at 4.5 V), change DIR, then take OE low again; the new side drives within 58 ns. The whole turn takes about 108 ns, a couple of instructions on most controllers.
While OE is high nothing drives the bus, so the lines float. Pull-ups or pull-downs on the bus hold them at a known level; TI's layout notes point out that disabling the outputs does not disable the inputs, so a floating transceiver pin still needs a level.
What it draws when busy
Standing still, the chip draws at most 80 µA (to 85 °C). Switching costs more: each transceiver has a power dissipation capacitance of 40 pF. With all 8 lines toggling at 1 MHz on 5 V that is 40 pF × 5 V × 1 MHz × 8 = 1.6 mA, or 8 mW, before the current that charges the wiring on the outputs. Fit 100 nF from VCC to ground right at pin 20.
Tips and checks
- For a one-way buffer, tie DIR to VCC and OE to ground, and feed the A side.
- Pull OE up with 10 kΩ on anything that powers up with the controller, so nothing drives before the code is ready.
- Change DIR only with OE high. A DIR change with OE low makes a short fight on every line.
- Unused A or B pins on the input side must not float. Tie them to ground or VCC; OE does not switch off the inputs.
- For 3.3 V to 5 V use a 74HCT245 on 5 V; for 5 V to 3.3 V a 74LVC245A on 3.3 V. Both drop into the same footprint.
- Keep each output under 25 mA and all eight under 70 mA; eight LEDs at 6 mA each come to 48 mA.
Substitutes
A 74HC245 from another maker should drop into the same socket. The HCT and LVC parts below share the pinout but have different input levels and supply ranges, so check those before fitting one in place of the HC245.
| Part | Pins | Verdict |
|---|---|---|
| SN74HC245DW / SN74HC245PW | same as the DIP | The same TI part in SOIC and TSSOP for a PCB, with the same pin numbers and the same data sheet.Texas Instruments SNx4HC245 Octal Bus Transceivers With 3-State Outputs (SCLS131F), p. 3 |
| SN74HCT245N | same as the DIP | Same pins and function, 5 V only (4.5 to 5.5 V), with TTL input levels: a high is anything above 2 V. This is the one to fit when a 3.3 V controller has to drive 5 V logic.Texas Instruments SNx4HCT245 Octal Bus Transceivers With 3-State Outputs (SCLS020H), p. 3; Texas Instruments SNx4HCT245 Octal Bus Transceivers With 3-State Outputs (SCLS020H), p. 4 |
| SN74LVC245A | same as the DIP (SOIC, SSOP, TSSOP; no DIP) | Same pins and function on 1.65 to 3.6 V, and its inputs accept up to 5.5 V at any valid supply. Run it on 3.3 V to bring 5 V signals down to a 3.3 V controller.Texas Instruments SN74LVC245A Octal Bus Transceiver With 3-State Outputs (SCAS218X), p. 3; Texas Instruments SN74LVC245A Octal Bus Transceiver With 3-State Outputs (SCAS218X), p. 5 |
Bench check: is it working?
- Wire VCC, ground and 100 nF at pin 20. Tie DIR to VCC and OE to ground.
- Put an LED and 470 Ω from B1 to ground. Tie A2 to A8 to ground.
- Take A1 to VCC: the LED lights. Take A1 to ground: it goes out.
- Take OE to VCC with A1 high. The LED should go out; B1 is now high-impedance.
- With OE low again, measure B1 with the LED lit. Near 4.3 V or above is normal at about 6 mA.
The logic levels lesson explains the 0.7 VCC and 0.3 VCC thresholds and the HCT input levels, and the 74HC595 is the usual next step when eight outputs have to come from fewer pins.
What we'd do
Use the SN74HC245N as a one-way buffer on a 5 V board: DIR to VCC, OE pulled up with 10 kΩ and driven low by the controller, 100 nF at pin 20, and every unused input tied down. On a two-way bus, change DIR only with OE high. For 3.3 V to 5 V fit a 74HCT245 instead, and for 5 V down to 3.3 V a 74LVC245A.
Questions people ask
What does the DIR pin on a 74HC245 do?
It sets the direction for all eight channels: high sends A to B, low sends B to A. It has no effect while OE is high.
Can a 74HC245 convert 3.3 V to 5 V?
Not reliably. On 5 V it needs 3.5 V for a high and a 3.3 V output gives 3.3 V at most. The 74HCT245 on 5 V accepts anything over 2 V, so it is the part for that job.
Can a 74HC245 drive LEDs?
Yes, at a few milliamps each: TI writes its output figures at 6 mA and asks for no more than 25 mA per output. Keep the eight together under 70 mA.
Does the 74HC245 need pull-up resistors?
Not for one-way use with OE held low. Fit one on OE so the outputs stay off at power-up, and fit them on a two-way bus, where nothing drives the lines while OE is high.
Why does my bus read garbage when both sides are connected?
Two outputs are probably driving the same lines. With one high and one low, the line sits near 2.3 V, which reads as neither level, and the chips pass about 81.1 mA between them. Check that only one driver has its output enabled.
Buying a 74HC245 in India
Shops list it as 74HC245 or SN74HC245N in DIP-20, and as 74HC245D or SN74HC245DW for boards. Check the letters after 74: HC, HCT and LVC parts look the same and are sold side by side. Our guide to buying electronic components in India compares ten online sellers and covers how to spot fakes.
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Datasheets this page was checked against
- Texas Instruments, SNx4HC245 Octal Bus Transceivers With 3-State Outputs (SCLS131F) (SCLS131F, December 1982, revised August 2022)
- Texas Instruments, SNx4HCT245 Octal Bus Transceivers With 3-State Outputs (SCLS020H) (SCLS020H, March 1984, revised December 2022)
- Texas Instruments, SN74LVC245A Octal Bus Transceiver With 3-State Outputs (SCAS218X) (SCAS218X, January 1993, revised January 2015)
Makers revise datasheets. If the copy you download has a newer revision and a number here disagrees with it, the datasheet wins, and we would like to hear about it.