Parts
74HC logic gates: 74HC00, 74HC02, 74HC04, 74HC08, 74HC14, 74HC32 and 74HC86 pinouts and limits
By Bulan Sarkar
All seven chips on this page are 14-pin packages with VCC on pin 14 and ground on pin 7. The 74HC00 (NAND), 74HC08 (AND), 74HC32 (OR) and 74HC86 (XOR) share one pinout: inputs on pins 1 and 2, output on pin 3. The 74HC02 (NOR) does not: its output comes first, on pin 1. The 74HC04 and 74HC14 are six inverters, input on pin 1 and output on pin 2, and only the 74HC14 has Schmitt-trigger inputs.
The page covers which chip is which, the input levels near 5 V, the 74HC14 thresholds from two makers, an RC oscillator worked through with real numbers, and the 3.3 V logic trap. Every figure comes from Texas Instruments' SN74HC sheets and Nexperia's 74HC sheets; where they differ, both are shown.
Datasheet: Texas Instruments SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L) (PDF)Ask Datasheet Guru about the 74HC14N
Pinout by package
Top view, notch up: pin 1 is top left, the count runs down the left side and back up the right.
The 74HC08 (AND), 74HC32 (OR) and 74HC86 (XOR) use exactly these pins.
Source: Texas Instruments SNx4HC00 Quadruple 2-Input NAND Gates (SCLS181H), p. 3 (Figure 5-1, D, DB, N, NS, PW, J or W package, top view, and Table 5-1 pin functions); Texas Instruments SNx4HC08 Quadruple 2-Input AND Gates (SCLS081J), p. 3 (SN74HC08 pin functions: 1A 1, 1B 2, 1Y 3, 3Y 8, 4Y 11, the same order); Texas Instruments SNx4HC32 Quadruple 2-Input OR Gates (SCLS200F), p. 3 (SN74HC32 pin functions, the same order); Texas Instruments SNx4HC86 Quadruple 2-Input XOR Gates (SCLS100F), p. 3 (SN74HC86 pin functions, the same order); Texas Instruments SNx4HC00 Quadruple 2-Input NAND Gates (SCLS181H), p. 17 (package option addendum: SN74HC00N, PDIP (N) 14 pins, marking SN74HC00N)
Top view, notch up. Output first: pin 1 is 1Y, the inputs are pins 2 and 3.
Not the 74HC00 pinout. A 74HC02 in a 74HC00 socket drives its outputs into the other chip’s input wiring.
Source: Texas Instruments SNx4HC02 Quadruple 2-Input Positive-NOR Gates (SCLS076G), p. 3 (Figure 5-1, D, DB, N, NS, PW, J or W package, top view, and the pin functions table: 1Y on pin 1); Texas Instruments SNx4HC02 Quadruple 2-Input Positive-NOR Gates (SCLS076G), p. 18 (package option addendum: SN74HC02N, PDIP (N) 14 pins, marking SN74HC02N); Nexperia 74HC02; 74HCT02 Quad 2-input NOR gate, p. 2 (Nexperia 74HC02 pinning, SO14 and TSSOP14: the same order)
Top view, notch up. Six inverters: inputs on 1, 3, 5, 9, 11, 13, outputs on 2, 4, 6, 8, 10, 12.
The 74HC04 has the same pins. Only the 74HC14 has Schmitt-trigger inputs.
Source: Texas Instruments SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L), p. 3 (Figure 4-1, D, DB, N, NS, PW, J or W package, top view, and the pin functions table); Texas Instruments SNx4HC04 Hex Inverters (SCLS078H), p. 3 (SN74HC04 pin functions: the same order); Texas Instruments SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L), p. 16 (package option addendum: SN74HC14N, PDIP (N) 14 pins, marking SN74HC14N)
Top view, pin 1 at the dot or bevel. Same pin order as the DIP.
Nexperia lists SO14, TSSOP14 and leadless packages only, no DIP.
Source: Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 2 (Section 5.1 pinning, D package SOT108-1 (SO14) and PW package (TSSOP14)); Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 1 (Table 1 ordering information: 74HC00D, SO14, −40 to +125 °C); Nexperia 74HC08; 74HCT08 Quad 2-input AND gate, p. 2 (74HC08 pinning: the same order); Nexperia 74HC32; 74HCT32 Quad 2-input OR gate, p. 3 (74HC32 pinning: the same order); Nexperia 74HC86; 74HCT86 Quad 2-input EXCLUSIVE-OR gate, p. 2 (74HC86 pinning: the same order)
Top view, pin 1 at the dot or bevel. Same pin order as the DIP.
Source: Nexperia 74HC14; 74HCT14 Hex inverting Schmitt trigger, p. 2 (Section 6.1 pinning, D package SOT108-1 (SO14)); Nexperia 74HC14; 74HCT14 Hex inverting Schmitt trigger, p. 1 (Table 1 ordering information: 74HC14D, SO14, −40 to +125 °C); Nexperia 74HC04; 74HCT04 Hex inverter, p. 3 (74HC04 pinning: the same order)
Which one do you have?
The two digits after 74HC name the function, and they are the same at every maker: 00 is a quad 2-input NAND, 02 a quad NOR, 04 a hex inverter, 08 a quad AND, 14 a hex Schmitt inverter, 32 a quad OR, 86 a quad XOR. TI prints an SN prefix and a package letter after the number: SN74HC00N is the plastic DIP, SN74HC00D the SOIC. Nexperia drops the prefix (74HC00D, 74HC00PW) and no longer lists a DIP for any of these parts.
A T after HC (74HCT00) marks the TTL-input version. It has the same pins, but it runs only from 4.5 to 5.5 V and takes any input above 2.0 V as high. 74LS and plain 7400 parts belong to the older bipolar families; this page covers HC and HCT only.
Absolute maximum ratings
On ratings the two makers agree line for line: 7 V absolute maximum on the supply, 2 to 6 V recommended, ±25 mA from any one output and ±50 mA through the VCC or ground pin for the whole chip. They part on temperature. TI's commercial SN74HC parts are rated −40 to 85 °C, except the SN74HC08, which TI now rates to 125 °C; every Nexperia 74HC part here is rated to 125 °C.
| Parameter | SN74HC00NDIP-14 | SN74HC02NDIP-14 | SN74HC14NDIP-14 | 74HC00DSOP-14 | 74HC14DSOP-14 |
|---|---|---|---|---|---|
| Supply voltage, absolute maximum VCC | −0.5 to 7 V | −0.5 to 7 V | −0.5 to 7 V | −0.5 to +7 V | −0.5 to +7 V |
| Supply voltage, recommended VCC | 2 to 6 V | 2 to 6 V | 2 to 6 V | 2.0 to 6.0 V | 2.0 to 6.0 V |
| Input voltage, recommended VI | 0 to VCC | 0 to VCC | 0 to VCC | 0 to VCC | 0 to VCC |
| Output current, continuous, absolute maximum IO | ±25 mA | ±25 mA | ±25 mA | ±25 mA | ±25 mA |
| Current through VCC or GND, absolute maximum | ±50 mA | ±50 mA | ±50 mA | 50 mA (ICC), −50 mA (IGND) | 50 mA (ICC), −50 mA (IGND) |
| Input or output clamp current IIK, IOK | ±20 mA | ±20 mA | ±20 mA | ±20 mA | ±20 mA |
| Total power dissipation Ptot | not given (thermal resistance only) | not given (thermal resistance only) | not given (thermal resistance only) | 500 mW | 500 mW, derate above 100 °C (SO14) |
| Operating temperature TA | −40 to 85 °C (SN74HC08: −55 to 125 °C) | −40 to 85 °C | −40 to 85 °C | −40 to +125 °C | −40 to +125 °C |
The 50 mA pin limit matters more than the 25 mA one. Four outputs each lighting an LED at 15 mA are inside the per-output figure and over the pin figure. Keep the total under 50 mA, and for guaranteed logic levels keep each output near the 4 mA the tables are written for.
Input levels, output drive and speed
| Parameter | SN74HC00NDIP-14 | SN74HC02NDIP-14 | SN74HC14NDIP-14 | 74HC00DSOP-14 | 74HC14DSOP-14 |
|---|---|---|---|---|---|
| High-level input voltage, min VIHVCC = 4.5 V | 3.15 V | 3.15 V | see VT+ (HC04: 3.15 V) | 3.15 V (−40 to 85 °C; no 25 °C limit printed) | see VT+ (HC04: 3.15 V) |
| Low-level input voltage, max VILVCC = 4.5 V | 1.35 V | 1.35 V | see VT− (HC04: 1.35 V) | 1.35 V (−40 to 85 °C) | see VT− (HC04: 1.35 V) |
| Positive-going threshold VT+VCC = 4.5 V | none: not a Schmitt input | none: not a Schmitt input | 1.55 min, 2.5 typ, 3.13 V max | none: not a Schmitt input | 1.7 min, 2.38 typ, 3.15 V max |
| Negative-going threshold VT−VCC = 4.5 V | none: not a Schmitt input | none: not a Schmitt input | 0.9 min, 1.6 typ, 2.45 V max | none: not a Schmitt input | 0.9 min, 1.4 typ, 2.0 V max |
| Hysteresis VHVCC = 4.5 V | none: not a Schmitt input | none: not a Schmitt input | 0.4 min, 0.9 typ, 2.1 V max | none: not a Schmitt input | 0.4 min, 0.98 typ, 1.4 V max |
| High-level output voltage VOHVCC = 4.5 V, IO = −4 mA | 3.98 min, 4.3 V typ | 3.98 min, 4.3 V typ | 3.98 min, 4.3 V typ | 4.32 V typ; 3.84 V min (−40 to 85 °C) | 3.98 min, 4.32 V typ |
| Low-level output voltage, max VOLVCC = 4.5 V, IO = 4 mA | 0.26 V (0.33 V at −40 to 85 °C) | 0.26 V (0.33 V at −40 to 85 °C) | 0.26 V (0.33 V at −40 to 85 °C) | 0.15 V typ; 0.33 V max (−40 to 85 °C) | 0.26 V (0.33 V at −40 to 85 °C) |
| Propagation delay tpdVCC = 4.5 V, CL = 50 pF, 25 °C | HC00: 9 typ, 18 ns max; HC08, HC32: 10 typ, 20 max; HC86: 12 typ, 20 max | 9 typ, 18 ns max | HC14: 12 typ, 25 ns max; HC04: 9 typ, 19 max | HC00: 9 ns typ, no 25 °C max; HC08: 9 typ, 18 max; HC32: 8 typ, 18 max; HC86: 14 typ, 24 max | HC14: 15 typ, 25 ns max; HC04: 9 typ, 17 max |
| Propagation delay, max tpdVCC = 4.5 V, CL = 50 pF, −40 to 85 °C | HC00: 23 ns; HC08, HC32, HC86: 25 ns | 23 ns | HC14: 31 ns; HC04: 24 ns | HC00, HC08, HC32: 23 ns; HC86: 30 ns | HC14: 31 ns; HC04: 21 ns |
| Supply current, quiescent, max ICCVCC = 6 V, inputs at VCC or GND | 2 µA (20 µA at −40 to 85 °C) | 2 µA (20 µA at −40 to 85 °C) | 2 µA (20 µA at −40 to 85 °C) | 20 µA (−40 to 85 °C) | 2.0 µA (20 µA at −40 to 85 °C) |
| Input capacitance Ci | 3 typ, 10 pF max | 3 typ, 10 pF max | 3 typ, 10 pF max | 3.5 pF typ | 3.5 pF typ |
A plain HC input sees anything below 1.35 V as low and anything above 3.15 V as high when VCC is 4.5 V. Both makers give the same pair, and both scale with the supply: at 6 V the limits are 1.8 V and 4.2 V. In between the state is undefined, and an input parked there makes the chip draw extra current. That is why an unused input must go to VCC or ground, never left open.
The output side is symmetrical. At 4.5 V and 4 mA an output stays above 3.98 V when high and below 0.26 V when low, on both makers' sheets. Propagation delay at 4.5 V into 50 pF is 17 to 25 ns maximum at 25 °C, depending on the gate and the maker; the 74HC14 is the slowest at 25 ns on both sheets. Nexperia's current 74HC00 sheet gives no 25 °C maximum at all, only 23 ns over −40 to 85 °C, so design to that.
A plain HC input also wants a fast edge. TI sets a 500 ns maximum rise or fall time at 4.5 V, and Nexperia 139 ns per volt; a slow RC edge or a sensor output sits in the undefined band too long, and the output can switch more than once on the way through. Use a 74HC14 for those signals.
74HC00: quad 2-input NAND
Four NAND gates. Gate 1 takes pins 1 and 2 and drives pin 3; gate 2 takes 4 and 5 and drives 6. On the other side the order turns round: output 3Y on pin 8 with inputs on 9 and 10, output 4Y on 11 with inputs on 12 and 13. The output is low only when both inputs are high.
Because NAND can make any other gate, the 74HC00 is the usual spare-parts chip: tie both inputs of a gate together for an inverter, or cross-couple two gates for a set-reset latch with active-low inputs.
74HC02: quad 2-input NOR, output first
The 74HC02 has its own pin arrangement. Pin 1 is the output 1Y, with its inputs on pins 2 and 3; gate 2 drives pin 4 from pins 5 and 6. On the right side, gate 3 takes pins 8 and 9 and drives 10, and gate 4 takes 11 and 12 and drives 13. TI and Nexperia draw it the same way. The output is high only when both inputs are low.
So a 74HC02 never drops into a 74HC00, 08, 32 or 86 socket, and the reverse is no better. Fitted in the wrong place, its outputs fight whatever drives those input pins.
74HC04: hex inverter
Six inverters, each input on an odd pin and its output on the next: 1 to 2, 3 to 4, 5 to 6 down the left side, then 9 to 8, 11 to 10, 13 to 12 on the right. Delay at 4.5 V is 19 ns maximum on TI's sheet and 17 ns on Nexperia's. Its inputs have the plain 1.35 V and 3.15 V limits, so feed it clean, fast edges.
74HC08: quad 2-input AND
Same pins as the 74HC00, and the output is high only when both inputs are high. On TI's sheet it is a little slower than the 74HC00: 20 ns maximum at 4.5 V against 18 ns. Nexperia gives 18 ns for both. TI rates its SN74HC08 from −55 to 125 °C, wider than the other SN74HC parts here.
74HC14: hex Schmitt inverter and its thresholds
The 74HC14 has the 74HC04 pinout, but each input has two thresholds instead of one. A rising input switches the output low when it passes VT+, and a falling input switches it back high only when it drops below VT−. The gap between them, the hysteresis, is what lets the chip take a slow ramp or a noisy signal and give a clean edge.
Both makers describe the same behavior with different numbers. At 4.5 V TI gives VT+ from 1.55 V to 3.13 V (typical 2.5 V) and VT− from 0.9 V to 2.45 V (typical 1.6 V). Nexperia gives VT+ from 1.7 V to 3.15 V (typical 2.38 V) and VT− from 0.9 V to 2 V (typical 1.4 V). Hysteresis is at least 0.4 V on both sheets; TI allows up to 2.1 V, Nexperia up to 1.4 V. Neither sheet has a 5 V row: the nearest are 4.5 V and 6 V.
To design to both, a signal must fall below 0.9 V to be read as low and rise above 3.15 V to be read as high, and noise on it must stay under 0.4 V peak to peak. TI states the first two rules in its input section, using VT− minimum and VT+ maximum, and the noise rule from the minimum hysteresis.
TI lists no input rise-time limit for the 74HC14 and Nexperia calls the rise and fall times unlimited. A slow input still costs supply current while it passes through the thresholds; Nexperia plots that extra current against VCC.
74HC32: quad 2-input OR
Same pins as the 74HC00. The output is high when either input is high, or both. Delay is 20 ns maximum at 4.5 V on TI's sheet and 18 ns on Nexperia's.
74HC86: quad 2-input XOR
Same pins as the 74HC00. The output is high when the inputs differ, which makes the 74HC86 the chip for a controllable inverter (tie one input high and the gate inverts, tie it low and the signal passes), a parity check or an edge detector. It is the slowest quad here on Nexperia's sheet, 24 ns maximum at 4.5 V against 18 ns for the 74HC02, 08 and 32; TI gives 20 ns.
What they are good for
- Glue logic on a 2 to 6 V board: gating a clock, combining enable signals, inverting a reset line.
- Cleaning up a slow or noisy edge with a 74HC14: an RC-debounced push button, a phototransistor, a long cable.
- A cheap oscillator or clock from one 74HC14 gate, a resistor and a capacitor, worked through below.
- Buffering a weak signal into several loads: one HC output drives many HC inputs, which draw at most 1 µA each.
They are a poor choice for driving relays, motors or more than a few milliamps of LED current, and a 3.3 V output cannot be trusted to drive a 74HC input on 5 V (see further down). The logic families lesson compares HC with the other CMOS and TTL families.
Worked example: a 74HC14 RC oscillator on 4.5 V
One gate of a 74HC14 with a resistor from its output back to its input and a capacitor from the input to ground. Three AA cells give 4.5 V, the supply both datasheets specify the thresholds at, so the numbers below come straight from the tables.
1. How it runs. At switch-on the capacitor is empty, the input is low and the output is high. The output charges the capacitor through 10 kΩ until the input reaches VT+, the output drops low, and the capacitor discharges until the input falls to VT−. Then it repeats.
2. Charging time. The capacitor climbs from VT− to VT+ toward 4.5 V, which takes RC × ln((VCC − VT−) / (VCC − VT+)). With TI's typical 2.5 V and 1.6 V: 10 kΩ × 100 nF = 1 ms, times ln((4.5 − 1.6) / (4.5 − 2.5)) = 372 µs.
3. Discharging time. Falling from VT+ to VT− toward 0 V takes RC × ln(VT+ / VT−) = 1 ms × ln(2.5 / 1.6) = 446 µs.
4. Frequency. The period is 818 µs, so f = 1 / 818 µs = 1.22 kHz, high for 45 % of each cycle. Put another way, the period is 0.818 × RC.
5. The other maker. Nexperia's typical 2.38 V and 1.4 V give 0.911 × RC, or 1.1 kHz. Nexperia also plots a measured factor K for this circuit, f ≈ 1 / (K × RC), and at 5 V its curve reads about 1, which would make it about 1 kHz.
6. The spread. Any part inside TI's 4.5 V limits gives a period between 0.356 × RC and 2.08 × RC, so this circuit can run anywhere from 481 Hz to 2.81 kHz. Typical thresholds give about 1.22 kHz; a particular chip may not.
7. Check the output current. The most the resistor can carry is VCC − VT− across 10 kΩ, at most 360 µA, far inside the 4 mA the output levels are specified at.
For a set frequency, put a trimmer in series with a smaller fixed resistor and tune it on the bench. The RC time constant lesson derives the charging curve behind steps 2 and 3.
Worked example in numbers
- Frequency, TI typical
- 1.22 kHz
- Frequency, Nexperia typical
- 1.1 kHz
- Period
- 0.818 × RC
- Possible range
- 481 Hz to 2.81 kHz
Driving a 5 V 74HC input from 3.3 V logic
A 3.3 V microcontroller wired to a 74HC gate on 5 V is a common trap. At 4.5 V a plain HC input needs at least 3.15 V to count as high, which leaves 0.15 V of margin for a perfect 3.3 V output. Neither maker prints a 5 V row; between the 4.5 V and 6 V limits (3.15 V and 4.2 V) the requirement at 5 V works out to about 3.5 V, above the 3.3 V level.
The fix is one of three: power the 74HC gate from 3.3 V too (it is specified from 2 V), use the 74HCT version of the same chip, whose 2.0 V threshold leaves 1.3 V of margin, or use a level shifter. Our 3.3 V to 5 V level shifter guide compares the options. Going the other way, a 5 V HC output into a 3.3 V input needs a divider or a shifter, never a direct wire.
Tips and checks
- Fit 100 nF from pin 14 to pin 7, right at the chip, as TI's power section asks. Fast HC edges need it even at low clock rates.
- Tie every unused input to VCC or ground. An open CMOS input floats into the undefined band, and the gate can oscillate or draw current. Unused outputs can stay open.
- Check the part number before you fit a 74HC02. It is the only chip here whose pin 1 is an output.
- For an input from a switch, a sensor or a long wire, use a 74HC14, not a 74HC04 or a 74HC00 gate wired as an inverter.
- An LED straight off an output is fine at a few milliamps with a series resistor. For 15 mA or more per LED, or several at once, add a transistor so the chip stays under its 50 mA pin limit.
The IC power and decoupling and pull-up and pull-down lessons cover the first two points in detail.
Substitutes
Within a part number, TI and Nexperia parts swap freely. Across part numbers the only safe swap is a 74HC14 for a 74HC04; the HCT parts swap for HC on a 5 V board.
| Part | Pins | Verdict |
|---|---|---|
| 74HCT00, 74HCT02, 74HCT04, 74HCT08, 74HCT14, 74HCT32, 74HCT86 | same as the HC part | Same pins and the same gates, but for 4.5 to 5.5 V only, with TTL input levels: any input above 2.0 V counts as high. The fix when a 3.3 V output has to drive a 5 V gate.Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 2; Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 4; Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 5 |
| Nexperia 74HC00D … 74HC86D | same as the TI part | Second source in SO14 with the same pin order for every number on this page. Nexperia rates them to 125 °C; TI’s commercial parts stop at 85 °C (the SN74HC08 at 125 °C).Nexperia 74HC00; 74HCT00 Quad 2-input NAND gate, p. 2; Nexperia 74HC14; 74HCT14 Hex inverting Schmitt trigger, p. 2; Texas Instruments SNx4HC00 Quadruple 2-Input NAND Gates (SCLS181H), p. 3 |
| 74HC14 in place of a 74HC04 | 1A 1Y 2A 2Y … 7 GND, 14 VCC | Same pins and the same logic, and the Schmitt inputs tolerate slow or noisy edges. It is slower (25 ns against 19 ns maximum at 4.5 V), so check timing in fast logic. The swap does not work the other way round in an oscillator or a debouncer.Texas Instruments SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L), p. 3; Texas Instruments SNx4HC04 Hex Inverters (SCLS078H), p. 3; Texas Instruments SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L), p. 6; Texas Instruments SNx4HC04 Hex Inverters (SCLS078H), p. 6 |
Bench check: is it working?
- Power the chip from 5 V with every input tied to ground and measure the supply current. It should be a few microamps; TI allows 20 µA at 6 V up to 85 °C. Milliamps means an input is floating or the part is damaged.
- Walk each gate through its truth table with two wires to VCC or ground and a meter on the output: near 5 V for a 1, near 0 V for a 0.
- For a 74HC14, feed one input from a potentiometer across the supply and turn it slowly up, then down. The output should flip low somewhere near 2.5 V going up and back high near 1.6 V coming down (TI's typical figures at 4.5 V; a given chip may sit anywhere inside the limits), and never chatter in between.
- Build the oscillator above on one gate and check the output on a scope: a square wave near 1.22 kHz on 4.5 V. Anything from about 481 Hz to 2.81 kHz is still inside the datasheet limits.
The oscilloscope measurements lesson covers reading the frequency and duty cycle off the screen.
What we'd do
Keep a 74HC00 and a 74HC14 in the drawer: between them they cover most glue logic and every slow or noisy input. Check the 74HC02 pinout every time you use one, power HC gates from the same rail as whatever drives them, and buy the HCT version when a 3.3 V part has to drive a 5 V gate. Use the 74HC14 oscillator for clocks and tones where the exact frequency does not matter or can be trimmed, and a crystal or a timer IC where it does.
Questions people ask
What is the pinout of the 74HC00?
Pin 1 input 1A, 2 input 1B, 3 output 1Y, 4 and 5 inputs of gate 2, 6 its output, 7 ground, 8 output 3Y, 9 and 10 its inputs, 11 output 4Y, 12 and 13 its inputs, 14 VCC. The 74HC08, 74HC32 and 74HC86 use the same pins.
Why is the 74HC02 pinout different?
Neither datasheet says why. The NOR quad simply puts each output before its inputs: pin 1 output, pins 2 and 3 inputs. TI and Nexperia both draw it that way, so treat it as a separate pinout and check it every time.
What is the difference between the 74HC04 and the 74HC14?
Same pins and same logic. The 74HC14 has Schmitt-trigger inputs, with about 1 V of hysteresis at 4.5 V (0.4 V minimum), so it accepts slow and noisy inputs. The 74HC04 is slightly faster.
What are the 74HC14 threshold voltages at 5 V?
Neither maker gives a 5 V row. At 4.5 V, TI's typical figures are 2.5 V rising and 1.6 V falling, Nexperia's 2.38 V and 1.4 V. TI's 6 V figures are 3.3 V and 2.0 V. At 5 V expect values between the two rows.
Can a 74HC gate run on 3.3 V?
Yes. HC parts are specified from 2 to 6 V, and on 3.3 V they accept 3.3 V logic directly. HCT parts are not: they need 4.5 to 5.5 V.
Buying 74HC logic chips in India
The DIP versions of all seven are stocked by most Indian component sellers, often as TI SN74HC parts and sometimes with no maker named. Nexperia parts come in SO14 only, so buy those for a PCB. Check the full number on the body, because a 74HC14 listing may turn out to be a 74HCT14 or an LS part. Our guide to buying electronic components in India compares ten online sellers and covers how to spot fakes.
One email a month from the bench
New circuits, lessons, part guides and calculators, on the first Sunday of each month.
Used in these lessons
Lessons that go deeper
Datasheets this page was checked against
- Texas Instruments, SNx4HC00 Quadruple 2-Input NAND Gates (SCLS181H) (SCLS181H, December 1982, revised August 2021)
- Texas Instruments, SNx4HC02 Quadruple 2-Input Positive-NOR Gates (SCLS076G) (SCLS076G, December 1982, revised December 2020)
- Texas Instruments, SNx4HC04 Hex Inverters (SCLS078H) (SCLS078H, December 1982, revised April 2021)
- Texas Instruments, SNx4HC08 Quadruple 2-Input AND Gates (SCLS081J) (SCLS081J, December 1982, revised February 2025)
- Texas Instruments, SNx4HC14 Hex Inverters with Schmitt-Trigger Inputs (SCLS085L) (SCLS085L, December 1982, revised February 2025)
- Texas Instruments, SNx4HC32 Quadruple 2-Input OR Gates (SCLS200F) (SCLS200F, December 1982, revised April 2021)
- Texas Instruments, SNx4HC86 Quadruple 2-Input XOR Gates (SCLS100F) (SCLS100F, December 1982, revised April 2021)
- Nexperia, 74HC00; 74HCT00 Quad 2-input NAND gate (Rev. 11, 29 April 2025)
- Nexperia, 74HC02; 74HCT02 Quad 2-input NOR gate (Rev. 9, 15 February 2024)
- Nexperia, 74HC04; 74HCT04 Hex inverter (Rev. 10, 16 February 2024)
- Nexperia, 74HC08; 74HCT08 Quad 2-input AND gate (Rev. 9, 16 February 2024)
- Nexperia, 74HC14; 74HCT14 Hex inverting Schmitt trigger (Rev. 10, 29 February 2024)
- Nexperia, 74HC32; 74HCT32 Quad 2-input OR gate (Rev. 10, 30 April 2025)
- Nexperia, 74HC86; 74HCT86 Quad 2-input EXCLUSIVE-OR gate (Rev. 7, 2 April 2024)
Makers revise datasheets. If the copy you download has a newer revision and a number here disagrees with it, the datasheet wins, and we would like to hear about it.