How PCBs are made: from your Gerber files to a tested board

You send a set of Gerber files, one per layer: top and bottom copper, solder mask, legend, solder paste if you order a stencil, and the board outline. The holes travel in a separate drill file, usually in Excellon format. Your design tool also exports them as a single zip, and that zip is what the fab's website reads.

The first person to see your board is a CAM engineer, or software standing in for one. CAM (computer-aided manufacturing) checks the files against the fab's limits. It also widens each track slightly to allow for the copper that etching will eat from its sides, and places many copies of your board on a production panel with tooling holes and test coupons round the edge. If something breaks a rule, this is where the order stops and you get an email.

Our take: open the zip in a Gerber viewer before you upload it. A missing outline or drill file is the most common reason an order stalls at CAM.

Every board takes the same path. The two steps drawn dashed apply only to boards with inner layers.

The order matters. The holes are drilled before the outer copper is patterned, because the hole walls have to be plated at the same time as the tracks. And the solder mask goes on after etching, because it has to cover the finished tracks and leave only the pads open.

Copper on a PCB is sold by weight: ounces of copper spread over one square foot. One ounce over a square foot, at copper's standard density of 8.89 g/cm³ (NBS Handbook 100), is a sheet 34.3 µm thick. Fabs round it to 0.035 mm. Half an ounce is 17.2 µm and two ounces 68.7 µm.

The board starts as a laminate: a sheet of FR-4 (woven glass cloth in epoxy) with foil bonded to both sides. A plated hole joins the two foils through the board, and the finished section looks like Figure 2.

The weight you order is the finished weight on the outer layers. Ask for two ounces when a track has to carry several amps; the PCB design page works out how wide it has to be.

CNC drills make the holes, often through a stack of panels at once. JLCPCB drills from 0.15 mm to 6.3 mm on two-layer boards and holds each hole within ±0.075 mm of where you put it (JLCPCB). Larger holes are routed.

A freshly drilled hole wall is bare glass and epoxy, which does not conduct. The panel goes through a chemical line that cleans the walls and deposits a very thin layer of copper with no current at all (electroless copper). That layer is too thin to carry anything. Its job is to let the next step, electroplating, build real thickness on the walls.

A deep, narrow hole is harder to plate than a short, wide one, because the plating solution has to flow through it. The measure is the aspect ratio: board thickness over drill size.

The smallest hole, 0.15 mm, is 10.7 times deeper than it is wide in a 1.6 mm board. At 0.2 mm that falls to 8 : 1, and at 0.3 mm to 5.3 : 1. JLCPCB charges more for the smallest holes (JLCPCB); they are the hardest to plate.

How long does the plating take? Faraday's law gives the copper deposited per unit of charge. Divide by copper's density and you get thickness against time. At a current density of 2 A/dm², our example of a moderate setting, and with every coulomb going into copper, the wall grows 0.445 µm a minute. The 18 µm average JLCPCB quotes (JLCPCB) takes 40 minutes.

Real lines lose some of the current to side reactions, and a hole wall plates more slowly than the panel face, so the times are a lower bound. The sum still shows why a factory cannot rush this step: the copper grows at well under a micrometre a minute.

Your tracks are made photographically. A light-sensitive film (photoresist) is laminated over the copper and exposed to UV through your artwork, either through a film or with a laser that draws it directly. The developer washes away the unexposed resist, leaving bare copper only where your tracks and pads go.

On most two-layer lines that bare copper is then plated up, along with the hole walls, and covered with a thin layer of tin. The resist is stripped, an etchant dissolves the copper the tin does not protect, and the tin is stripped in turn. What is left is your copper pattern.

Etching is the step that sets your track widths, and it is not exact. The etchant works sideways as well as down, which is why CAM widens every track before imaging. JLCPCB quotes a track width tolerance of ±20 % (JLCPCB). A 0.15 mm track can come back anywhere from 0.12 mm to 0.18 mm. Its resistance moves the other way, from -17 % to +25 %.

Before the mask goes on, an automated optical inspection (AOI) machine compares each panel with the CAM data and flags nicks, shorts and missing copper.

The ring of copper left round a hole is the annular ring: half the pad diameter minus half the hole. The drill can land up to ±0.075 mm off (JLCPCB), so the ring on one side can be that much thinner than you drew it.

Take a component hole of 0.8 mm (our example). In a 1.2 mm pad the ring is 0.20 mm, and the thin side can drop to 0.125 mm. In a 1.3 mm pad it is 0.25 mm, which is JLCPCB's recommended ring for two-layer, one-ounce boards (JLCPCB), and the thin side keeps 0.175 mm. The absolute minimum JLCPCB lists is 0.18 mm.

The smallest via JLCPCB lists, a 0.15 mm hole in a 0.25 mm pad, has a ring of only 0.05 mm. Move the hole 0.075 mm and it reaches the edge of the pad. That is why the same table asks for the pad to be 0.1 mm larger than the hole and prefers 0.15 mm (JLCPCB). A via only has to join two layers; a component pad also has to hold a solder joint, so give pads the full ring.

A four-layer board starts from a thin core with copper on both sides. The two inner layers are imaged and etched first, inspected, and given a rough oxide surface so resin will grip them. Then the stack is laid up: a sheet of copper foil, prepreg (glass cloth soaked in half-cured epoxy), the etched core, more prepreg and a second foil. Heat and pressure in a vacuum press melt the prepreg and cure it, and the stack becomes one solid board. From there it follows the two-layer route from drilling onwards.

From that stack (JLCPCB): the prepreg between the outer and inner copper is 0.210 mm, and its dielectric constant is 4.4 (the core's is 4.6). Those two numbers set the impedance of an outer-layer track; the microstrip section of the PCB design page uses the same kind of values. Copper is only 6.3 % of the board's thickness. The inner layers are listed at 0.0152 mm, a little under the 17.2 µm that half an ounce works out to.

Solder mask. The green coat is a liquid photo-imageable (LPI) ink. It is coated over the whole panel, exposed and developed like the photoresist so that the pads open up, then cured. JLCPCB specifies at least 10 µm of mask (JLCPCB). The mask stops solder bridging between pads and protects the copper.

Surface finish. Bare copper tarnishes and solders badly, so the exposed pads get a finish. HASL dips the board in molten solder and levels it with hot air: cheap, robust, but the pads come out slightly domed. ENIG plates nickel and then a thin layer of gold: flat pads, better for fine-pitch parts. OSP is a thin organic coating that keeps the copper fresh until assembly. JLCPCB requires ENIG for its smallest BGA pads, and for tracks left without mask, because HASL could short them (JLCPCB).

Legend. The white silkscreen text is printed last, by screen or inkjet. JLCPCB asks for lines at least 0.15 mm wide; thinner characters do not read (JLCPCB).

Electrical test. Each board is checked for opens and shorts against the netlist taken from your files. Small orders go on a flying-probe tester, whose probes move from pad to pad; large runs use a fixed bed of pins made for that board.

Routing. Finally a router cuts each board out of the panel, or a V-score leaves it in a breakable strip. JLCPCB holds a routed edge to ±0.2 mm, or ±0.1 mm at extra cost, and a V-scored edge to ±0.4 mm (JLCPCB).

Our take: choose HASL for through-hole and ordinary SMD boards, and ENIG once there are fine-pitch ICs or the pads have to be flat.

Every dimension on the finished board has a band round the one you drew. Three matter most.

The hole band is lopsided, +0.13 and −0.08 mm (JLCPCB), so size a hole for the smallest it can be. A component lead must still pass through a hole 0.08 mm undersize. A board edge connector or a card that slides into a slot needs the thickness band: a 1.6 mm board can arrive anywhere from 1.44 mm to 1.76 mm.

What we'd do: set the design rules in your layout tool to the fab's recommended values, not its minimums. Use 0.3 mm vias in 0.6 mm pads wherever space allows. Give component pads at least a 0.25 mm ring, and size every hole for the lead plus the 0.08 mm the fab may take off. Such boards plate easily and leave margin for the tolerances above.

• Give the fab finished hole sizes, not drill sizes. The fab picks a larger drill to leave room for the plating.
• Keep the board outline on its own layer as one closed line. An open outline is a CAM question and a day's delay.
• A via in a 0.3 mm hole in a 1.6 mm board is 5.3 : 1. Below 0.2 mm you pay extra and gain little on a hobby board.
• Leave tracks that carry current wider than the minimum: with the ±20 % tolerance, a track at the limit can be 20 % narrower still.
• When the boards arrive, test a few with a meter on continuity before you solder anything. It takes a minute and catches a damaged board before it carries parts.
• Order the parts while the boards are made. Our guide to buying components in India lists where.

• How to design a great PCBTrace widths, vias, microstrip and decoupling, with the formulas.
• PCB design sectionEvery PCB page on the site in one place.
• Resistivity and conductanceWhy copper, and how its resistivity is defined.
• Wire resistance and voltage dropWhat a narrower track does to a supply line.
• Conductors and insulatorsCopper on one side, FR-4 on the other.
• IC packagesWhich packages need flat ENIG pads.
• SMD packagesThe pad sizes your footprints draw.
• Regulator thermal designCopper weight and area as a heatsink.
• Soldering basicsAssembling the board once it arrives.
• Reading data sheetsFinding the lead diameter that sizes a hole.

• JLCPCB, PCB Manufacturing & Assembly Capabilities (rigid PCB) (drill 0.15–6.3 mm on 2 layers; hole tolerance +0.13/−0.08 mm; hole position ±0.075 mm; average hole plating 18 µm; via 0.15/0.25 mm, 0.2 mm preferred; PTH annular ring 0.25 mm recommended, 0.18 mm minimum (2-layer, 1 oz); track width ±20 %; board thickness ±10 % from 1.0 mm; LPI solder mask ≥10 µm; HASL, ENIG, OSP)
• JLCPCB, Multilayer high precision PCBs with impedance control (stackup JLC04161H-7628) (4-layer 1.6 mm: 0.035 mm outer copper, 0.2104 mm 7628 prepreg, 0.0152 mm inner copper, 1.065 mm core; prepreg εr 4.4, core 4.6; solder mask 1.2 mil on laminate, 0.6 mil on copper)
• NBS Handbook 100, Copper Wire Tables (1966), p. 4 (the international standard density for copper, 8.89 g/cm³ at 20 °C)
• NIST, CODATA 2022 value: Faraday constant (96 485.332 12 C/mol, exact)
• CIAAW, Atomic weight of copper (63.546)

Read on 12 October 2026. Our own choices, not taken from any source: the 2 A/dm² plating current density and 100 % current efficiency (real lines plate more slowly, and hole walls more slowly than the surface), the 0.8 mm hole with 1.2 mm and 1.3 mm pads, the 0.6 mm hole and the 0.15 mm track. Fab limits are JLCPCB's; other fabs differ, so check yours. No prices or lead times: they change too often for this page.