Parts

TL072 dual JFET op-amp: pinout, input range, ratings and the TL071 and TL074

By Bulan Sarkar

The TL072 is two op-amps in one 8-pin package. Pin 1 is the first output, pins 2 and 3 its inverting and non-inverting inputs, pin 4 is V−, pins 5 and 6 are the second amplifier's inputs, pin 7 its output and pin 8 is V+. The TL071 is the single version and the TL074 the quad, with different pins, covered further down.

Its inputs are JFETs, so they draw picoamps, but they only work when kept about 4 V above the negative rail, and that limit decides where the part fits. The figures here come from TI's family datasheet (SLOS080W, July 2025) and ST's TL071 and TL072 sheets; where they differ, the page shows both.

Datasheet: Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W) (PDF)Ask Datasheet Guru about the TL072CP

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Pinout by package

TL072CP DIP-8 · TI1=1OUT 2=1IN- 3=1IN+ 4=V- 5=2IN+ 6=2IN- 7=2OUT 8=V+
top view, notch upTL072CP181OUTV+271IN-2OUT361IN+2IN-45V-2IN+

Top view, notch up: pin 1 is top left and the count runs down the left side, then up the right.

Source: Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 5 (Figure 4-5, TL072x D, DDF, JG, P, PS and PW packages, top view, and Table 4-3 pin functions); Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 38 (package option addendum: TL072CP, PDIP (P) 8 pins, marking TL072CP)

TL072CDT SOP-8 · ST1=1OUT 2=1IN- 3=1IN+ 4=V- 5=2IN+ 6=2IN- 7=2OUT 8=V+
top view, notch up072C181OUTV+271IN-2OUT361IN+2IN-45V-2IN+

Top view, pin 1 at the dot or bevel. Same pin order as the DIP.

ST lists the TL072 in SO8 only; the pin order is the DIP order.

Source: STMicroelectronics TL072, TL072A, TL072B Low noise JFET dual operational amplifiers (DocID2298), p. 1 (pin connections (top view), SO8: 1 output 1, 4 VCC−, 8 VCC+); STMicroelectronics TL072, TL072A, TL072B Low noise JFET dual operational amplifiers (DocID2298), p. 14 (Table 5 order codes: TL072CDT, SO8, marking 072C)

TL071CP DIP-8 · TI1=NC 2=IN- 3=IN+ 4=V- 5=NC 6=OUT 7=V+ 8=NC
top view, notch upTL071CP18NCNC27IN-V+36IN+OUT45V-NC

Top view, notch up. Output on pin 6, supplies on 4 and 7, as on almost every single op-amp.

TI now shows pins 1 and 5 as no-connect on the DIP; only its PS (SO-8) package keeps offset null.

Source: Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 3 (Figure 4-3, TL071x D and P packages, top view, and Table 4-1: pins 1, 5 and 8 do not connect); Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 4 (Figure 4-4: offset null pins on the TL071C PS (SO-8) package only)

TL071CN DIP-8 · ST1=N1 2=IN- 3=IN+ 4=V- 5=N2 6=OUT 7=V+ 8=NC
top view, notch upTL071CN18N1NC27IN-V+36IN+OUT45V-N2

Top view, notch up. Offset null on pins 1 and 5.

Source: STMicroelectronics TL071 Low noise JFET single operational amplifier, p. 1 (pin connections (top view), DIP8 and SO-8: 1 offset null 1, 5 offset null 2, 8 N.C.); STMicroelectronics TL071 Low noise JFET single operational amplifier, p. 2 (Figure 2, input offset voltage null circuit: 100 kΩ between N1 and N2, wiper to VCC−)

TL074CN DIP-14 · TI1=1OUT 2=1IN- 3=1IN+ 4=V+ 5=2IN+ 6=2IN- 7=2OUT 8=3OUT 9=3IN- 10=3IN+ 11=V- 12=4IN+ 13=4IN- 14=4OUT
top view, notch upTL074CN1141OUT4OUT2131IN-4IN-3121IN+4IN+411V+V-5102IN+3IN+692IN-3IN-782OUT3OUT

Top view, notch up. V+ is pin 4 and V− is pin 11.

Pin 4 is V+ here but V− on the TL072. Check before you reuse a footprint.

Source: Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 8 (Figure 4-8, TL074x D, DYY, J, N, NS, PW and W packages, top view, and Table 4-6 pin functions); Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 39 (package option addendum: TL074CN, PDIP (N) 14 pins, marking TL074CN)

Which one do you have?

The last digit is the amplifier count: TL071 single, TL072 dual, TL074 quad. The letter after it is the temperature grade (on TI's parts C for 0 to 70 °C, I for −40 to 85 °C, M for −55 to 125 °C), and an A or B before that letter marks a part sorted for lower offset. The final letter is the package: P or N is the through-hole DIP, D or PS a surface-mount SO package. A TL072CP is the commercial-grade dual in an 8-pin DIP.

TI now builds the family on a new die, sold with an H suffix (TL072H). It also says a part marked without the H, such as a TL072CP, may come from either the old or the new production flow. You cannot tell from the print, so this page designs to the older, looser specification. ST sells the TL072 in SO8 only, marked 072C on the body.

Absolute maximum ratings

The makers disagree on the supply. TI's table allows 42 V across the part, then its own power-supply section warns that more than 36 V, or more than ±18 V on a split supply, can damage it. ST rates the TL072 at ±18 V. Design to 36 V in total: ±15 V and ±12 V both sit comfortably inside it.

Absolute maximum and recommended ratings, from each maker's datasheet
ParameterTL072CPDIP-8TL072CDTSOP-8TL071CPDIP-8TL071CNDIP-8TL074CNDIP-14
Supply voltage, total, absolute maximum VS42 V (TI warns above 36 V, p. 32)36 V (±18 V)42 V (TI warns above 36 V, p. 32)36 V (±18 V)42 V (TI warns above 36 V, p. 32)
Supply voltage, recommended VS4.5 to 40 V6 to 36 V4.5 to 40 Vnot given4.5 to 40 V
Input voltage, absolute maximum VIV− − 0.5 V to V+ + 0.5 V±15 V, never beyond the supplyV− − 0.5 V to V+ + 0.5 V±15 V, never beyond the supplyV− − 0.5 V to V+ + 0.5 V
Input voltage, recommended VIV− + 4 V to V+ + 0.1 Vnot given (see VICR)V− + 4 V to V+ + 0.1 Vnot given (see VICR)V− + 4 V to V+ + 0.1 V
Differential input voltage VIDVS + 0.2 V±30 VVS + 0.2 V±30 VVS + 0.2 V
Thermal resistance, junction to air RθJA85 °C/W125 °C/W (SO8)85 °C/W85 °C/W (DIP8)80 °C/W
Output short circuitcontinuous, one amplifier to groundinfinite, within dissipationcontinuous, to groundinfinite, within dissipationcontinuous, one amplifier to ground
Operating temperature, C grade TA0 to 70 °C0 to 70 °C0 to 70 °C0 to 70 °C0 to 70 °C

The input line matters more than the supply line. TI recommends keeping each input between 4 V above V− and 0.1 V above V+. ST puts it another way: at ±15 V the input range is ±11 V at least, typically −12 V to +15 V. Either way the inputs work right up to the positive rail and stop well short of the negative one. TI also notes that the new die clamps its inputs to both rails with diodes, so a signal that can swing more than 0.5 V past a rail needs a resistor to hold the current to 10 mA.

Bias current, offset and speed

At ±15 V and 25 °C unless marked; C grade, original die (min/max unless marked typical)
ParameterTL072CPDIP-8TL072CDTSOP-8TL071CPDIP-8TL071CNDIP-8TL074CNDIP-14
Input offset voltage VOS±15 V, 25 °C, C grade3 typ, 10 mV max3 typ, 10 mV max3 typ, 10 mV max3 typ, 10 mV max3 typ, 10 mV max
Input bias current IB25 °C65 typ, 200 pA max20 typ, 200 pA max65 typ, 200 pA max20 typ, 200 pA max65 typ, 200 pA max
Input bias current, hot IBover the C-grade range, 0 to 70 °C7 nA max20 nA max7 nA max20 nA max7 nA max
Common-mode input range VICR±15 V±11 V min; −12 to +15 V typ±11 V min; −12 to +15 V typ±11 V min; −12 to +15 V typ±11 V min; −12 to +15 V typ±11 V min; −12 to +15 V typ
Output swing VOM±15 V, RL ≥ 10 kΩ±12 V min, ±13.5 V typ±12 V min, ±13.5 V typ±12 V min, ±13.5 V typ±12 V min, ±13.5 V typ±12 V min, ±13.5 V typ
Output swing VOM±15 V, RL = 2 kΩ±10 V min±10 V min, ±12 V typ±10 V min±10 V min, ±12 V typ±10 V min
Open-loop gain AOLC grade, 25 °C25 min, 200 V/mV typ25 min, 200 V/mV typ25 min, 200 V/mV typ25 min, 200 V/mV typ25 min, 200 V/mV typ
Gain-bandwidth product GBW5.25 MHz typ (3 MHz on PS and NS packages)2.5 min, 4 MHz typ5.25 MHz typ (3 MHz on PS)2.5 min, 4 MHz typ5.25 MHz typ (3 MHz on NS)
Slew rate SRRL = 2 kΩ, CL = 100 pF8 min, 20 V/µs typ8 min, 16 V/µs typ8 min, 20 V/µs typ8 min, 16 V/µs typ8 min, 20 V/µs typ
Input noise voltage density enf = 1 kHz37 nV/√Hz typ (18 on PS, NS)15 nV/√Hz typ37 nV/√Hz typ (18 on PS)15 nV/√Hz typ37 nV/√Hz typ (18 on NS)
Supply current IQno load, 25 °C1.4 typ, 2.5 mA max per amplifier1.4 typ, 2.5 mA max1.4 typ, 2.5 mA max1.4 typ, 2.5 mA max1.4 typ, 2.5 mA max per amplifier

The JFET inputs draw at most 200 pA at 25 °C on both makers' sheets. That current is junction leakage, and ST notes it roughly doubles for every 10 °C, so the hot limit is 7 nA (TI, up to 70 °C) or 20 nA (ST, over its whole range). Even 20 nA through a 100 kΩ input resistor is only 2 mV.

10 µV100 µV1 mV10 mVIB, 25 °C200 pA × 100 kΩ20 µVIB, 70 °C (TI)7 nA × 100 kΩ700 µVIB, hot (ST)20 nA × 100 kΩ2 mVOffset voltageTL072C, 25 °C max10 mVDC error at the + input, log scale
Figure 1. Bias current through a 100 kΩ input resistor against the offset voltage. With JFET inputs, the offset voltage is the DC error that counts.

The two makers part ways on noise and bandwidth. ST gives 15 nV/√Hz and a gain-bandwidth of 4 MHz typical, 2.5 MHz minimum. TI's current table splits by package: 18 nV/√Hz and 3 MHz on its SO packages, 37 nV/√Hz and 5.25 MHz on the rest, the DIP included. For a design, take ST's 2.5 MHz minimum, the only bandwidth figure either sheet guarantees.

The input range, and why 5 V is a poor fit

On ±15 V the TL072 is comfortable: inputs from −11 V to +15 V, and an output TI and ST both guarantee to swing ±12 V into 10 kΩ. On a single 5 V supply the same rule (inputs at least 4 V above V−) leaves an input window from 4 V to 5.1 V. A signal centred at 2.5 V is outside it. Neither maker gives an output swing for a supply that low; TI's swing-against-supply curve starts at about ±3.5 V.

TL072C±15 V+15-15in −11 to +15 Vout ±12 VTL072Csingle 5 V50?in 4 to 5.1 Vout not givenTL072Hsingle 5 V50in 1.5 to 5 Vout 0.2 to 4.79 Vsupplyinput rangeoutput swing
Figure 2. Where the inputs and output may go. Each column is drawn to its own supply; on 5 V the original die has almost no usable input range.

What happens outside the range is the other question. TI's current sheet shows a "No Phase Reversal" plot only for the new H die: a follower on ±10 V whose input runs past the rails, with an output that clips cleanly instead of flipping. It makes no such statement for the original die. ST lists "latch-up free operation" among the features and says nothing about phase reversal. Keep every input inside the stated range and you never depend on either behaviour.

The H die fixes most of this. TI rates its inputs from 1.5 V above V− up to V+, and its output within 215 mV of either rail at 10 kΩ (specified on a 40 V supply). If you must run from 5 V, buy a part marked TL072H, or use an op-amp made for single supplies.

TL071: the single, and its offset pins

The TL071 has the usual single op-amp pinout: inverting input on 2, non-inverting on 3, V− on 4, output on 6, V+ on 7. Pins 1 and 5 are where the makers now differ. ST's TL071 sheet still names them offset null 1 and 2, with a 100 kΩ trimmer between them and its wiper to V−. TI's July 2025 revision deleted the trim function from every package except its PS (SO-8) part, and draws pins 1, 5 and 8 of the DIP as "do not connect".

So do not wire a trimmer to a TL071 of unknown origin. If an old circuit has one, the part may ignore it, and pins marked no-connect are best left open. Null the offset in the circuit instead, or buy the TL071B with its 3 mV maximum.

TL074: the quad, with the supplies moved

The TL074 puts four amplifiers in a 14-pin DIP. Amplifiers 1 and 2 sit on pins 1 to 7 and amplifiers 3 and 4 on pins 8 to 14, in the same order as the TL072. The trap is the supply: V+ is pin 4 and V− is pin 11. On the TL072, pin 4 is V−.

TL072 (DIP-8)18V+273645V−TL074 (DIP-14)114213312411V+V−5106978top view, notch up
Figure 3. Pin 4 is the negative supply on the TL072 and the positive supply on the TL074.

Electrically it is the same amplifier: TI covers all three parts in one table, and for the C grade in a DIP the only line that changes is the thermal resistance, 80 °C/W for the 14-pin package against 85 °C/W for the 8-pin one.

What it is good for

  • Audio preamps, mixers, tone controls and line drivers on ±12 V or ±15 V. The picoamp inputs let you use large resistors without a DC error.
  • Active filters, where high-value resistors keep the capacitors small.
  • Buffers for high-impedance sources: a piezo pickup, a pH probe, a sample-and-hold capacitor.
  • Integrators, where bias current would otherwise charge the capacitor.

It is a poor choice on a single 5 V or 3.3 V rail next to a microcontroller, for anything that has to swing close to either rail, and for DC precision below a few millivolts. The op-amp limitations lesson explains each of these limits.

Worked example: a gain-of-11 audio stage on ±12 V

One half of a TL072 as an AC-coupled, non-inverting amplifier: a line-level signal in, about eleven times larger out, on the ±12 V rails common in audio gear.

1. Set the gain. With 10 kΩ from the output to the inverting input and 1 kΩ from there to 0 V, the gain is 1 + 10 kΩ / 1 kΩ = 11, or 20.8 dB.

2. Bias the input. A 100 kΩ resistor from pin 3 to 0 V gives the input a DC path. At 200 pA it drops 20 µV; at ST's 20 nA hot limit, 2 mV. Neither matters next to the 10 mV offset, which the gain turns into at most 110 mV at the output.

3. Pick the coupling capacitor. 1 µF into 100 kΩ sets the low corner at 1 / (2π × 100 kΩ × 1 µF) = 1.6 Hz, well below 20 Hz. Use a film capacitor: the voltage across it is close to zero, so polarity is never an issue.

4. Check the input range. On ±12 V the inputs may go down to -8 V. The signal at pin 3 sits around 0 V, far inside.

5. Check the output swing. Both makers guarantee ±12 V on ±15 V supplies, 3 V inside each rail. Keep the same 3 V on ±12 V and the output can swing ±9 V. The largest input is then 9 V / 11 = 818 mV peak, or 579 mV RMS.

6. Check bandwidth and slew rate. With ST's minimum 2.5 MHz, the stage stays flat to 2.5 MHz / 11 = 227 kHz. A full ±9 V swing at 20 kHz needs 2π × 20 kHz × 9 V = 1.13 V/µs, against a minimum slew rate of 8 V/µs.

C1 1 µF 3 2 1 8 4 R1 100 kΩ R2 10 kΩ R3 1 kΩ +12 V -12 V U1A TL072 in out
Figure 4. The gain-of-11 stage on half a TL072 (pins 1, 2 and 3), drawn as ngspice checked it: gain 11 at 1 kHz, low corner 1.6 Hz, a 500 mV peak input giving 5.5 V peak out. The second half (pins 5, 6, 7) is free for the other channel.
audio band1 Hz100 Hz10 kHz1 MHz01020301.6 Hz227 kHz20.8 dBgain in dB against frequency
Figure 5. The response of the stage. Both corners sit far outside 20 Hz to 20 kHz.

Fit 100 nF from each supply pin to ground, close to the package, as TI's layout section asks. The non-inverting amplifier lesson derives the gain formula.

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Worked example in numbers

Gain
11 (20.8 dB)
Low corner
1.6 Hz
Largest input
579 mV RMS
Output offset, max
110 mV

Tips and checks

  • Bypass both supply pins with 100 nF ceramics at the package, as TI's layout notes ask, and keep the input wiring short and away from the output and supply leads.
  • An unused half still needs a defined state. Wire it as a follower with its non-inverting input at 0 V, so it sits quietly instead of drifting into a rail.
  • For a DC-coupled stage with gain, the 10 mV offset multiplies by the gain. Buy the A or B grade (6 or 3 mV) or put a capacitor in series with the gain resistor so the DC gain drops to 1.
  • Inputs that can be driven past a rail, such as an input jack plugged in with the power off, need a series resistor that keeps the current under 10 mA.
  • Two TL072s and one TL074 are the same four amplifiers. The quad saves board space, but its supply pins are on 4 and 11.

Substitutes

The A, B and H versions of the TL072 drop into the same socket. The TL072H is the one to buy for new work: it fixes the input range and the output swing that this page keeps warning about.

Pin numbers as on the DIP-8 or SO-8 top view, notch or dot at pin 1
PartPinsVerdict
TL072A, TL072B1OUT … 4 V−, 8 V+The same die sorted for offset: 6 mV and 3 mV maximum against 10 mV for the plain TL072C. Drop-in wherever offset matters, such as a DC-coupled stage with gain.Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 15; STMicroelectronics TL072, TL072A, TL072B Low noise JFET dual operational amplifiers (DocID2298), p. 5
TL072H1OUT … 4 V−, 8 V+TI’s new die in the same pinout. Inputs work down to 1.5 V above V−, the output gets within about 0.2 V of each rail at 10 kΩ, offset is 4 mV max. The better choice for any new build.Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 5; Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 13; Texas Instruments TL07xx Low-Noise, FET-Input Operational Amplifiers (SLOS080W), p. 14
ST TL072CDT1OUT … 4 V−, 8 V+Second source in SO8 with the same pin order and the same ±15 V limits. ST rates the supply 36 V, lower than TI’s 42 V; design to 36 V.STMicroelectronics TL072, TL072A, TL072B Low noise JFET dual operational amplifiers (DocID2298), p. 1; STMicroelectronics TL072, TL072A, TL072B Low noise JFET dual operational amplifiers (DocID2298), p. 4

Bench check: is it working?

  1. Power the chip on ±12 V with no signal and measure each output to ground. A follower should sit within 10 mV of 0 V and the stage above within about 0.1 V (the offset times the gain of 11). An output stuck near a rail means an input is out of range or floating.
  2. Measure the supply current. Two amplifiers draw 2.8 mA typical and 5 mA at most. Much more points to oscillation or a damaged part.
  3. Feed a 1 kHz sine of 0.5 V peak into the stage and look at the output on a scope: a clean 5.5 V peak sine, in phase with the input.
  4. Raise the input until the output clips. On ±12 V it should flatten somewhere past ±9 V, and the same way at the top and bottom.

The bench power supply lesson covers setting up a split supply with current limits.

What we'd do

Use the TL072 where it was designed to work: audio and filter stages on ±12 V or ±15 V, with input resistors of 100 kΩ or more and signals that stay at least 4 V clear of the negative rail. For new builds buy the TL072H, and for anything on a single 5 V supply choose a single-supply op-amp instead of hoping the original die copes.

Questions people ask

What is the TL072 pinout?

Pin 1 output A, 2 inverting input A, 3 non-inverting input A, 4 V−, 5 non-inverting input B, 6 inverting input B, 7 output B, 8 V+. Both makers use this order for the DIP and SO packages.

Can a TL072 run from a single 5 V supply?

Not usefully. TI recommends inputs at least 4 V above V−, which leaves 4 V to 5.1 V on a 5 V supply, and neither maker specifies the output swing that low. The TL072H accepts inputs down to 1.5 V above V−.

What is the difference between TL071, TL072 and TL074?

One, two and four amplifiers. The electrical figures are the same; the pins are not. The TL074 has V+ on pin 4, where the TL072 has V−.

Is the TL072 rail-to-rail?

No. The original die is guaranteed to swing only to within 3 V of each rail on ±15 V into 10 kΩ. The H die gets within about 0.2 V.

What is the maximum supply voltage of a TL072?

Design to 36 V in total, ±18 V on a split supply. ST rates the part ±18 V, and TI warns that more than 36 V can damage it, even though its absolute-maximum table lists 42 V.

Buying TL072 in India

The TL072CP in DIP-8 and the TL074CN in DIP-14 are stocked by most Indian component sellers, usually without a maker named. Ask whether the part is TI or ST, and look for the H suffix if you need the newer die. Check one from each batch with the bench test above before it goes into a board. Our guide to buying electronic components in India compares ten online sellers and covers how to spot fakes.

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